Semiconductor Module with Planar Galvanic Isolation

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Solution Overview

Problem

Conventional power semiconductor modules with integrated galvanic isolation between the power section and driver circuit are bulky due to large area requirements, making them unsuitable for practical use, and lack reliable galvanic isolation necessary for direct connection with application-specific microcontrollers.

Innovation Solution

A semiconductor module design featuring a carrier substrate with semiconductor switches and driver components on a circuit board, where the circuit board incorporates galvanic isolation through coreless transformers or planar coils, allowing for compact construction and reliable isolation between the driver components and semiconductor chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If galvanic isolation is integrated into conventional power semiconductor modules, then reliable isolation between power section and driver circuit is achieved, but the module dimensions become unwieldy and unsuitable for practical requirements

Engineering Contradiction:
Improvegalvanic isolation reliabilityVSAvoidmodule area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent implements galvanic isolation using planar coils and coreless transformers fabricated on the circuit board plane, transitioning from traditional three-dimensional isolation components to two-dimensional planar structures. This dimensional reduction enables compact integration while maintaining isolation functionality, directly resolving the contradiction between reliable isolation and small module area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent changes the physical parameters of the isolation implementation by using planar coils with optimized geometry and coreless transformer designs with specific winding configurations. These parameter optimizations enable effective galvanic isolation in a minimized area, solving the contradiction between isolation reliability and compact size.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If driver circuit is integrated in the power semiconductor module with compact galvanic isolation, then direct connection with microcontroller is enabled, but conventional isolation methods require too large area

Engineering Contradiction:
Improvedirect connection capabilityVSAvoidisolation area
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The patent merges the driver circuit integration with compact planar galvanic isolation on the same circuit board, combining two previously separate functions (isolation and driver integration) into a unified compact design. This enables direct microcontroller connection without requiring large isolation areas, resolving the contradiction between ease of operation and area consumption.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

By implementing isolation structures in the planar dimension rather than using vertical three-dimensional components, the patent enables direct connection capability while minimizing the area occupied by isolation structures, thus resolving the contradiction between direct connection ease and area requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If conventional IPM components are used with integrated driver circuit, then driver electronics are already integrated, but galvanic isolation area requirement is too large

Engineering Contradiction:
Improveintegration levelVSAvoidisolation area
Core Design Contradiction:
Device complexityVSArea of stationary object

Solution Approach 1:

The patent changes the geometric parameters of isolation structures by using optimized planar coil designs and coreless transformers with minimized footprint. This parameter optimization maintains high integration levels while reducing isolation area requirements, resolving the contradiction between device complexity and area consumption.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The transition to planar two-dimensional isolation structures enables maintaining high integration levels without the large area requirements of conventional three-dimensional isolation components, resolving the contradiction between integration complexity and area requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves compact, area-saving construction with reliable galvanic isolation, enabling direct connection to application-specific microcontrollers without additional isolation paths, enhancing the practicality and efficiency of power semiconductor modules.

Implementation Method 1

The circuit board has a galvanic isolation in a signal path between the at least one driver component and the at least one semiconductor chip

Methodology Applied
Scientific EffectGalvanic isolation: Electromagnetic Induction

Data Source

PatentUS7800222B2Semiconductor module with switching components and driver electronics
Publication Date: 2010.09.21 INFINEON TECHNOLOGIES AG
  • US7800222B2 patent drawing
  • US7800222B2 patent drawing
  • US7800222B2 patent drawing

AI summary

A semiconductor module comprises at least one semiconductor chip having at least one semiconductor switch. The at least one semiconductor chip is arranged on a carrier substrate. At least one driver component drives the at least one semiconductor switch. The at least one driver component is arranged on a circuit board. The at least one driver component has at least one input for receiving a control signal. The circuit board has a galvanic isolation in a signal path between the at least one driver component and the at least one semiconductor chip.