Power Semiconductor Module Press-On Pin Housing for Thermal Contact

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Solution Overview

Problem

Existing power semiconductor module assemblies are cumbersome to assemble and may degrade the stability of the housing, leading to reduced lifetime and inadequate thermal resistance between the substrate and the heat sink or ground surface.

Innovation Solution

A power semiconductor module arrangement that includes a semiconductor substrate with a dielectric insulation layer and a first metallization layer, semiconductor bodies mounted on the substrate, end stop elements extending vertically from the substrate or semiconductor bodies, and a housing with a casting compound covering the substrate and partly filling the housing. Press-on pins from the cover exert pressure on the end stop elements to secure the substrate in place.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If soldering or sintering techniques are used to mount semiconductor elements on the substrate, then reliable electrical connection is achieved, but the assembly process becomes cumbersome and time-consuming

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidassembly speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent replaces the thermal-based soldering/sintering process with a mechanical pressing system. Press-on pins apply mechanical force through the cover to press semiconductor elements directly onto the substrate, eliminating the need for heating and complex soldering operations while maintaining reliable electrical connection.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces press-on pins as intermediary mechanical elements that transmit pressing force from the cover to the semiconductor elements. These pins act as mediators between the housing structure and the mounted components, enabling simple mechanical attachment without direct thermal processing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Temperature

If a cover is used to exert force on the substrate to achieve thermal resistance, then thermal contact is improved, but the stability of the housing is degraded during assembly

Engineering Contradiction:
Improvethermal resistanceVSAvoidhousing stability
Core Design Contradiction:
TemperatureVSStability of the object's composition

Solution Approach 1:

The patent segments the force application function into dedicated press-on pins that are integrated into the cover structure. These pins concentrate and direct the pressing force onto specific mounting points, achieving the required thermal contact pressure while distributing mechanical stress to maintain overall housing stability during assembly.

Inventive Principle:
Principle #1Segmentation

3Temperature

If the substrate is pressed on the heat sink to achieve thermal resistance, then heat dissipation is improved, but the assembly process becomes more complex

Engineering Contradiction:
Improveheat dissipation efficiencyVSAvoidassembly complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent merges the thermal contact function with the mechanical mounting function. The same press-on pins that secure the substrate and semiconductor elements also provide the necessary pressing force to ensure thermal contact between the substrate and heat sink, eliminating the need for separate thermal management mechanisms.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP3913665B1A power semiconductor module and a method for producing a power semiconductor module
Publication Date: 2025.04.02 INFINEON TECHNOLOGIES AG
  • EP3913665B1 patent drawingFigure 1~3
  • EP3913665B1 patent drawingFigure 4~6B
  • EP3913665B1 patent drawingFigure 7

AI summary

A power semiconductor module comprises at least one semiconductor substrate (10) comprising a dielectric insulation layer (11) and a first metallization layer (111) attached to the dielectric insulation layer (11), at least one semiconductor body (20) arranged on the first metallization layer (111), at least one end stop element (48), wherein each end stop element (48) is arranged either on the semiconductor substrate (10) or on one of the at least one semiconductor body (20) and extends from the semiconductor substrate (10) or the respective semiconductor body (20) in a vertical direction (y) that is perpendicular to a top surface of the semiconductor substrate (10), and a housing at least partly enclosing the semiconductor substrate (10), the housing comprising sidewalls (42) and a cover (44). The housing further comprises at least one press-on pin (46), each of the at least one press-on pin extending from the cover (44) of the housing towards one of the at least one end stop element (48), and exerting a pressure on the respective end stop element (48).