Semiconductor Module Relay Board Interconnection

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Solution Overview

Problem

Existing semiconductor device compositions for inverter circuits, such as those described in Patent Documents 1 to 3, face challenges in reducing manufacturing costs and improving reliability due to increased wire lengths and parasitic resistance/inductance, which can lead to short-circuit faults and deteriorated electrical characteristics.

Innovation Solution

The semiconductor device employs a configuration where a first electronic component and multiple second electronic components are electrically connected via a first wire coupling the component to a substrate and a second wire coupling the substrate to the components, utilizing relay boards to shorten wire lengths and reduce parasitic resistance and inductance, thereby improving reliability and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wire lengths are increased to connect control chip and IGBT chips, then connectivity is achieved, but parasitic resistance and inductance increase leading to reliability deterioration

Engineering Contradiction:
Improvedevice reliabilityVSAvoidwire length
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent transitions from a planar two-dimensional layout to a three-dimensional stacked configuration. The control chip and IGBT chips are arranged in vertical layers with relay boards positioned between them, reducing wire lengths by utilizing the third dimension (height) for interconnections rather than spreading components out in a flat arrangement.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Relay boards are introduced as intermediary components positioned between the control chip and IGBT chips. These relay boards serve as intermediate connection points that reduce the overall wire length required for electrical connections, thereby decreasing parasitic resistance and inductance while maintaining proper signal routing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If relay boards are introduced to shorten wire lengths, then parasitic resistance and inductance are reduced, but device complexity increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidmodule complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The relay boards perform multiple functions simultaneously: they serve as electrical connection intermediaries, provide mechanical support for chip mounting, enable thermal management pathways, and facilitate modular assembly. This multi-functionality justifies the added complexity by delivering multiple benefits from a single component addition.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The semiconductor module is divided into distinct functional layers with relay boards separating the control chip layer from the IGBT chip layer. This segmentation allows for independent optimization of each layer, simplifies manufacturing processes, and enables modular replacement or upgrading of individual components without affecting the entire device.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9906165B2Semiconductor module
Publication Date: 2018.02.27 RENESAS ELECTRONICS CORP
  • US9906165B2 patent drawing
  • US9906165B2 patent drawing
  • US9906165B2 patent drawing

AI summary

Reliability of a semiconductor device is improved. A third semiconductor chip on which a control circuit is formed, and a first semiconductor chip of a plurality of IGBT chips are electrically connected via a high-side relay board. That is, the first semiconductor chip and the third semiconductor chip are electrically connected via a first wire, a high-side relay board and a second wire. Similarly, the third semiconductor chip on which the control circuit is formed and a second semiconductor chip of a plurality of IGBT chips are electrically connected via a low-side relay board. That is, the second semiconductor chip and the third semiconductor chip are electrically connected via the first wire, the low-side relay board and the second wire.