Semiconductor Module Resin Partitioning to Suppress Substrate Warpage

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Solution Overview

Problem

The manufacturing process of semiconductor modules generates shrinkage stress during resin curing, leading to warpage of the insulating substrate, which affects adhesion with peripheral configurations and can result in cracks and reduced heat dissipation.

Innovation Solution

A semiconductor module design that includes a laminated substrate with a partition wall dividing the sealing resin into multiple subspaces, reducing shrinkage stress and warpage by dispersing stress concentration and improving adhesion with the case and heat sink.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If sealing resin is filled in the case to seal the semiconductor element, then the semiconductor element is protected and sealed, but shrinkage stress is generated during curing causing warpage of the laminated substrate

Engineering Contradiction:
Improvesealing performanceVSAvoidflatness of laminated substrate
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The sealing resin is divided into multiple independent regions by partition walls extending from the circuit plate into the resin. This segmentation prevents uniform shrinkage stress across the entire resin volume, reducing warpage of the laminated substrate while maintaining effective sealing of the semiconductor element

Inventive Principle:
Principle #1Segmentation

2Shape

If partition walls are added to divide the sealing resin, then warpage is suppressed by reducing shrinkage stress concentration, but device complexity increases

Engineering Contradiction:
Improveflatness of laminated substrateVSAvoidstructural complexity
Core Design Contradiction:
ShapeVSDevice complexity

Solution Approach 1:

The partition walls serve multiple functions simultaneously: they divide the sealing resin to reduce shrinkage stress concentration, suppress warpage of the laminated substrate, and maintain structural integrity. This multi-functionality achieves warpage suppression without proportionally increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If the sealing resin is cured to seal the semiconductor element, then adhesion is improved, but shrinkage stress causes cracks and reduces heat dissipation performance

Engineering Contradiction:
Improveadhesion strengthVSAvoidcracks and heat dissipation reduction
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

By segmenting the sealing resin into multiple regions with partition walls, the shrinkage stress during curing is distributed across smaller volumes rather than concentrating uniformly. This reduces the likelihood of crack formation while maintaining adhesion strength and preserving heat dissipation performance

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively suppresses warpage of the laminated substrate and prevents cracks, ensuring reliable adhesion and improved heat dissipation performance during module operation.

Implementation Method 1

when curing of the resin starts in the process of filling or casting the resin, shrinkage stress is generated inside the resin

Methodology Applied
Scientific EffectShrinkage stress: Thermal Contraction

Implementation Method 2

a heat dissipation plate disposed on the lower surface of the insulating plate

Methodology Applied
Scientific EffectHeat conduction: Conduction (thermal)

Data Source

PatentUS20240030078A1Semiconductor module and semiconductor device
Publication Date: 2024.01.25 FUJI ELECTRIC CO LTD
  • US20240030078A1 patent drawing
  • US20240030078A1 patent drawing
  • US20240030078A1 patent drawing

AI summary

A semiconductor module includes: a laminated substrate configured by laminating an insulating plate, a heat dissipation plate disposed on a lower surface of the insulating plate, and a circuit plate disposed on an upper surface of the insulating plate; a semiconductor element disposed on an upper surface of the circuit plate; a case that surrounds the laminated substrate and a space housing the semiconductor element; a sealing resin filling the space of the case to seal the semiconductor element; and a partition wall that extends in an up-down direction to divide the space filled with the sealing resin into a plurality of subspaces. The partition wall has a lower end and an upper end opposite to each other in the up-down direction. At least a portion of the lower end of the partition wall is connected to the upper surface of the circuit plate.