Semiconductor Module Sealing Structure for Low High-Frequency Loss
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Solution Overview
Problem
High-frequency integrated circuits using silicon substrates experience electrical loss due to the electrical resistance and parasitic capacitance of the Si substrate, which adversely affect loss and noise characteristics, especially when sealed with mold materials having higher dielectric dissipation factors.
Innovation Solution
A semiconductor module design featuring a resin layer with a lower dielectric dissipation factor than the mold material, positioned to cover the semiconductor device and side surfaces, reducing electrical loss by minimizing leakage of high-frequency electric power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the semiconductor device is sealed with mold material, then the device is protected and sealed, but electrical loss increases due to high dielectric dissipation factor of the mold material
Solution Approach 1:
The sealing structure is divided into two distinct layers: a lower resin layer with low dielectric dissipation factor and an upper mold material layer with higher dielectric dissipation factor. This segmentation allows each layer to perform its specialized function - the resin layer minimizes electrical loss while the mold material provides robust sealing and protection.
Solution Approach 2:
Different regions of the sealing structure are assigned different material properties. The region closest to the semiconductor device (resin layer) uses material with optimized low dielectric dissipation factor to reduce electrical loss, while the outer region (mold material) uses material with superior sealing characteristics, creating local quality optimization throughout the structure.
2Loss of energy
If a resin layer with low dielectric dissipation factor is added, then electrical loss is reduced, but the device structure becomes more complex
Solution Approach 1:
The resin layer and mold material layer are merged into an integrated sealing structure where both materials work together synergistically. The resin layer is formed first as a base layer, then the mold material is applied over it, creating a unified sealing system that combines the electrical loss reduction benefits of the resin with the protective benefits of the mold material.
Solution Approach 2:
The sealing structure uses a composite material approach by combining two different materials (resin and mold material) with complementary properties. This composite structure allows the system to achieve both low electrical loss (from the resin layer) and effective sealing/protection (from the mold material layer) simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces electrical loss and parasitic capacitance, enhances reliability, and increases the freedom in selecting mold materials with improved characteristics such as high contactability and moisture resistance.
Implementation Method 1
A dielectric dissipation factor of the resin layer is smaller than a dielectric dissipation factor of the mold material
Data Source
AI summary
A semiconductor device includes a device layer including an electronic circuit including a semiconductor element, an insulating layer on one of surfaces of the device layer, and bumps that are on another of the surfaces of the device layer. The semiconductor device is mounted on a mounting substrate of a mounting substrate, with the another of the surfaces, where the bumps are disposed, of the device layer facing the mounting surface. A resin layer is on a surface of the insulating layer on a side opposite to the device layer. A mold material is on a region of the mounting surface on an outer side portion of the semiconductor device in plan view, a side surface of the semiconductor device, and at least a side surface of the resin layer. A dielectric dissipation factor of the resin layer is smaller than a dielectric dissipation factor of the mold material.