Semiconductor Module Layout for In-Situ Shorted Chip Detection
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Solution Overview
Problem
In semiconductor modules with parallel-connected semiconductor chips, identifying a short-circuit failure in a specific chip without disassembly is challenging, as conventional methods require disassembly and analysis by emission microscopy, which is time-consuming.
Innovation Solution
A semiconductor module with voltage-controlled switching elements connected in parallel, featuring distinct resistance values in connection routes, allows for determining failures by comparing currents through external terminals, enabling in-situ identification of faulty elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional failure identification methods are used, then accurate identification of failed semiconductor chips is achieved, but time consumption increases significantly due to disassembly and emission microscopy analysis
Solution Approach 1:
The patent applies preliminary action by pre-connecting identification electrodes to each semiconductor chip before the chips are sealed in the module. These electrodes remain accessible through the module packaging, allowing failure identification to be performed without disassembly. The identification electrodes are connected to terminal electrodes via external terminals, enabling current measurement to detect failed chips while the module remains assembled.
Solution Approach 2:
The patent uses identification electrodes as intermediaries to bridge the gap between the sealed semiconductor chips and the external measurement system. These electrodes penetrate through the module packaging, serving as conductors that allow electrical current to reach each chip individually without requiring the module to be opened. This intermediary structure enables non-destructive failure identification.
2Power
If semiconductor chips are connected in parallel for high current capability, then power handling increases, but the ability to identify individual chip failures decreases
Solution Approach 1:
The patent applies segmentation by providing separate identification electrodes for each semiconductor chip connected in parallel. Instead of a single common connection, each chip has its own dedicated identification electrode that can be individually accessed through the module packaging. This segmentation allows the electrical characteristics of each chip to be measured independently, enabling identification of which specific chip has failed while maintaining the parallel connection structure for high current capability.
3Measurement precision
If disassembly is performed for failure analysis, then accurate identification of failed chips is achieved, but manufacturing complexity and repair difficulty increase
Solution Approach 1:
The patent applies preliminary action by pre-configuring the module with identification electrodes that extend through the packaging to accessible external terminals. This preliminary setup during manufacturing eliminates the need for disassembly during repair or diagnostics. The identification electrodes are positioned and connected in advance, allowing failure identification to be performed on assembled modules, thereby simplifying repair procedures.
4Measurement precision
If emission microscopy analysis is used for failure identification, then precise localization of short-circuit failures is achieved, but the process becomes time-consuming and requires disassembly
Solution Approach 1:
The patent replaces the mechanical/optical system of emission microscopy analysis with an electrical measurement system. Instead of disassembling the module and using emission microscopy to visually locate failures, the invention uses electrical current measurements through identification electrodes to detect and identify failed chips. This substitution of measurement methodology eliminates the need for disassembly and significantly reduces analysis time while maintaining the ability to precisely identify failures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables rapid and non-destructive determination of short-circuit failures in semiconductor chips within the module, improving diagnostic efficiency and reducing downtime.
Implementation Method 1
a first connection route group having a plurality of connection routes connecting the first external terminal and the plurality of voltage-controlled switching elements, and a second connection route group having a plurality of connection routes connecting the second external terminal and the plurality of voltage-controlled switching elements and different in resistance value from each other
Data Source
AI summary
There is provided a semiconductor module capable of determining a semiconductor chip in which a short-circuit failure has occurred without being disassembled. A semiconductor module includes IGBT provided in each of semiconductor chips connected in parallel, switching of which being controlled by a gate voltage based on a gate signal; two external terminals input with the gate signal; a first connection route group having a first connection route and a third connection route connecting the external terminal and the IGBTs provided in the semiconductor chips respectively; and a second connection route group having a second connection route and a fourth connection route connecting the external terminal and the IGBTs provided in the semiconductor chips respectively.