Semiconductor Module Substrate Layout for Switching Loss Heat Balance
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Solution Overview
Problem
Semiconductor module arrangements face challenges in achieving highly symmetrical low-inductance commutation paths and managing temperature differences among controllable semiconductor elements, leading to inefficient thermal and electrical performance.
Innovation Solution
The use of separate semiconductor substrates with different thermal and electrical properties to optimize the placement of fast and slow switching elements, where fast switching elements are mounted on a substrate with high thermal conductivity and slow switching elements on a substrate with lower thermal conductivity, reducing overall costs and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If all controllable semiconductor elements are mounted on a single semiconductor substrate, then device complexity is reduced, but thermal management becomes inefficient due to different thermal requirements of fast and slow switching elements
Solution Approach 1:
The patent divides the semiconductor elements into two separate groups mounted on different substrates: fast switching elements on a first substrate and slow switching elements on a second substrate. This segmentation allows each substrate to be optimized for its specific thermal requirements, with the first substrate having higher thermal conductivity for heat-intensive fast switching elements, while reducing overall device complexity by maintaining modular substrate architecture.
2Temperature
If separate semiconductor substrates with different thermal properties are used, then thermal management efficiency is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by assigning different thermal conductivity properties to different substrates based on the specific thermal requirements of the semiconductor elements mounted on them. The first substrate has higher thermal conductivity for fast switching elements that generate more heat, while the second substrate has lower thermal conductivity suitable for slow switching elements. This localized optimization improves overall thermal management without requiring complete redesign of the entire device architecture.
3Temperature
If expensive high thermal conductivity substrates are used for all semiconductor elements, then thermal management efficiency is improved, but manufacturing cost increases
Solution Approach 1:
The patent changes the thermal conductivity parameter of the substrates to match the specific requirements of different semiconductor element groups. Instead of using uniformly high thermal conductivity substrates for all elements, the first substrate has higher thermal conductivity for fast switching elements while the second substrate has lower thermal conductivity for slow switching elements. This parameter optimization reduces manufacturing costs by avoiding unnecessary use of expensive high thermal conductivity materials where they are not needed, while maintaining effective heat dissipation for critical components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the thermal and electrical performance of semiconductor module arrangements by effectively managing heat dissipation and switching behavior, reducing costs by utilizing less expensive substrates for slower switching elements and maintaining high performance for faster switching elements.
Implementation Method 1
fast switching elements are mounted on a substrate with high thermal conductivity
Implementation Method 2
slow switching elements on a substrate with lower thermal conductivity
Data Source
AI summary
A semiconductor module arrangement includes a housing, a first semiconductor substrate arranged inside the housing, a second semiconductor substrate arranged inside the housing, a first plurality of controllable semiconductor elements, and a second plurality of controllable semiconductor elements. During operation of the semiconductor module arrangement, each controllable semiconductor element of the first plurality of controllable semiconductor elements generates switching losses and conduction losses, the switching losses being greater than the conduction losses. Further during operation of the semiconductor module arrangement, each controllable semiconductor element of the second plurality of controllable semiconductor elements generates switching losses and conduction losses, the conduction losses being greater than the switching losses. At least a first sub-group of the first plurality of controllable semiconductor elements is arranged on the first semiconductor substrate, and at least a first sub-group of the second plurality of controllable semiconductor elements is arranged on the second semiconductor substrate.