Semiconductor Module U-Shaped Current Path Inductance Reduction
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Solution Overview
Problem
Semiconductor modules are rectangular in plan view, leading to long wiring distances and increased inductance due to currents flowing along the long sides, which affects their performance.
Innovation Solution
A semiconductor module design featuring a first and second insulating plate with conductive plates and semiconductor chips, along with a printed-circuit board and wiring boards that reduce wiring length by forming a 'U' shaped current path, using connecting members and a sealing member to minimize inductance and improve reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a rectangular plan view is used for the semiconductor module, then the structure is simple and easy to manufacture, but the wiring distance becomes long and inductance increases
Solution Approach 1:
The patent transitions from a conventional rectangular plan view to a multi-layer three-dimensional structure. The wiring is arranged across multiple layers (first wiring layer, second wiring layer, third wiring layer) with vertical connections via through-holes, transforming a two-dimensional planar layout into a three-dimensional spatial arrangement. This dimensional change allows current paths to be shortened by utilizing vertical space rather than only horizontal space, thereby reducing inductance while maintaining manufacturing feasibility.
2Ease of manufacture
If external connection terminals are arranged in two lines along the long sides, then the module structure is conventional and easy to manufacture, but the wiring distance is long
Solution Approach 1:
The patent segments the wiring path into multiple discrete layers and sections. Instead of a single long continuous wiring path in one layer, the current path is divided into segments across different wiring layers (first, second, and third wiring layers), connected by vertical vias. This segmentation allows each segment to be optimized independently, reducing the total path length and inductance while maintaining ease of manufacture through standardized layer-by-layer construction.
Solution Approach 2:
The patent introduces vertical dimensionality to the wiring arrangement by creating multiple wiring layers stacked vertically. External connection terminals are distributed across different layers and positions, allowing current to travel through a three-dimensional path rather than a single two-dimensional line. This multi-layer vertical arrangement significantly reduces the horizontal wiring distance while maintaining conventional manufacturing processes.
Data Source
AI summary
A semiconductor module, including a board that has first and second conductive plates located side by side on a first insulating plate, a first external connection terminal located on the first conductive plate, first and second semiconductor chips respectively disposed on the first and second conductive plates, and a printed-circuit board including a second insulating plate and first and second wiring boards located on a first principal plane of the second insulating plate. The first wiring board electrically connects an upper surface electrode of the first semiconductor chip and a relay area on the second conductive plate. The second wiring board is electrically connected to an upper surface electrode of the second semiconductor chip. The semiconductor module further includes a second external connection terminal electrically connected to an end portion of the second wiring board and formed on the second principal plane of the second insulating plate.