Semiconductor Module U-Shaped Conductive Layer Inductance Reduction
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Solution Overview
Problem
Current semiconductor modules have high inductance between PN terminals, leading to increased switching losses and unbalanced switching times due to potential differences between semiconductor elements, which cannot be sufficiently reduced with existing configurations.
Innovation Solution
The semiconductor module incorporates a U-shaped conductive layer layout with mirror image arrangements of semiconductor elements and branching positive electrode terminals, increasing the number of parallel current paths and reducing current path lengths to minimize inductance and improve current distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional wiring layout is used, then manufacturing is simple, but inductance between PN terminals is high
Solution Approach 1:
The positive electrode terminal is divided into multiple branching ends (first and second positive electrode ends) that connect to different ends of the U-shaped conductive layer. This segmentation creates multiple parallel current paths, reducing the overall inductance between PN terminals and thereby reducing switching losses.
Solution Approach 2:
The conductive layer is configured in a U-shape in planar view, utilizing two-dimensional space optimization. This dimensional arrangement allows current to flow through multiple paths simultaneously, effectively reducing the inductance without increasing the physical footprint of the device.
2Reliability
If conventional terminal configuration is used, then manufacturing is easier, but switching times are unbalanced
Solution Approach 1:
The negative electrode terminal is positioned asymmetrically between the first and second positive electrode ends, with the semiconductor elements arranged in a mirror image configuration. This asymmetric yet balanced layout equalizes the current distribution and switching times across parallel semiconductor elements, improving reliability.
Solution Approach 2:
The U-shaped conductive layer with multiple positive electrode ends creates equipotential regions that balance the potential distribution across the semiconductor elements. This ensures that all parallel semiconductor elements switch simultaneously, eliminating timing imbalances and improving device reliability.
3Loss of energy
If inductance is not reduced, then wiring is simpler, but switching losses increase
Solution Approach 1:
Multiple current paths are merged into a single U-shaped conductive layer structure, combining the functionality of multiple separate wires into one integrated component. This merging reduces inductance by providing multiple parallel paths while maintaining a compact, unified structure that is manufacturable.
Data Source
AI summary
A semiconductor module includes a first semiconductor element and a second semiconductor element each having an upper-surface electrode and a lower-surface electrode, and being connected in parallel to configure an upper arm, a first conductive layer having a U-shape in planar view, having two end portions, and having an upper surface on which the first semiconductor element and the second semiconductor element are disposed in a mirror image arrangement, a positive electrode terminal having a body part and at least two positive electrode ends branched from the body part, and a negative electrode terminal having a negative electrode end disposed between the positive electrode ends. The positive electrode ends are respectively connected to one of the two end portions of the first conductive layer.