Semiconductor Package Mold Layer Segmentation for Stacking

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Solution Overview

Problem

Existing semiconductor package technologies face challenges in efficiently stacking multiple semiconductor chips while maintaining electrical connectivity and preventing damage during the reflow process, particularly in forming mold layers that do not obstruct chip stacking and require additional underfill layers.

Innovation Solution

A method of fabricating a semiconductor package involves forming a lower mold layer to enclose the side surfaces of lower semiconductor chips, ensuring the uppermost surface is coplanar or lower than the top surface, and an upper mold layer covering the stacks, with different materials and filler particle sizes to facilitate easy stacking and electrical connectivity without additional underfill layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional mold layer is formed to cover the entire chip stack, then the chips are protected, but the mold layer obstructs subsequent chip stacking operations

Engineering Contradiction:

Improvechip protectionVSAvoidstacking process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The mold layer is divided into two distinct segments: a lower mold layer that encloses only the side surfaces of lower chips, and an upper mold layer that covers the upper chips. This segmentation allows the lower mold layer to protect lower chips during mounting while leaving the top surfaces exposed for subsequent stacking operations, thereby resolving the contradiction between protection and stacking accessibility.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the mold structure are given different qualities and functions. The lower mold layer provides lateral protection for lower chips while maintaining open top surfaces, whereas the upper mold layer provides comprehensive coverage for upper chips. This local differentiation allows each region to serve its specific function without obstructing the overall stacking process.

Inventive Principle:

Principle #3Local quality

2Reliability

If additional underfill layers are added to prevent damage during reflow, then chip damage is reduced, but the manufacturing process becomes more complex and time-consuming

Engineering Contradiction:

Improvedamage prevention during reflowVSAvoidmanufacturing process simplicity

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The protective function previously requiring a separate underfill layer is merged into the lower mold layer structure. The lower mold layer simultaneously provides mechanical protection during reflow processes and serves as the foundational encapsulation structure, eliminating the need for additional underfill layers and simplifying the manufacturing process.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The lower mold layer is designed to perform multiple functions: it encloses and protects the side surfaces of lower chips, provides mechanical support during reflow processes, and maintains proper spacing for upper chip stacking. This multi-functionality replaces what would otherwise require multiple separate components or process steps.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If the uppermost surface of the lower mold layer is positioned higher than the top surface of lower chips, then lateral protection is improved, but it obstructs the mounting of upper stacks

Engineering Contradiction:

Improvelateral protectionVSAvoidmounting operation ease

Core Design Contradiction:

ReliabilityVSEase of operation

Solution Approach 1:

The mold layer height is dynamically optimized based on position: the lower mold layer extends laterally to protect chip sides but is constrained in height to remain coplanar with or below the top surfaces of lower chips, while the upper mold layer provides appropriate coverage for upper chips. This dynamic height differentiation enables both protection and operational accessibility.

Inventive Principle:

Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the easy stacking of multiple semiconductor chips with improved electrical connectivity and simplified fabrication by preventing damage during the reflow process and eliminating the need for additional underfill layers, enhancing the overall efficiency of semiconductor package assembly.

Implementation Method 1

forming a lower mold layer on the substrate to enclose a side surface of the lower stack and expose a top surface of the lower stack

Methodology Applied

Scientific EffectMolding:

Implementation Method 2

performing a reflow process to a structure with the lower solder balls to form lower connecting portions that are disposed between the substrate and the lower stack and are electrically connected to the substrate

Methodology Applied

Scientific EffectReflow:

Implementation Method 3

forming an upper mold layer to cover the lower mold layer, the lower stack, and the upper stack

Methodology Applied

Scientific EffectMolding:

Data Source

PatentUS9165916B2Semiconductor package and method of fabricating the same

Publication Date: 2015.10.20 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor package and a method of fabricating the same. The method may include mounting a lower stack including a plurality of lower semiconductor chips on a substrate and mounting an upper stack including a plurality of upper semiconductor chips on the lower stack. According to example embodiments of the inventive concept, the semiconductor package can be easily fabricated.