Semiconductor Device Multi-Layered Source Layer Structure
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Solution Overview
Problem
The complexity of connecting channel layers and source layers in three-dimensional semiconductor memory devices increases with the number of stacked memory cells, making it difficult to achieve stable electrical characteristics.
Innovation Solution
A semiconductor device with a multi-layered source layer structure, including a first and second source seed layer, an interlayer source layer, and a stacked structure, where the interlayer source layer grows from the channel layer exposed between the source seed layers, reducing the difficulty of connecting these layers and stabilizing electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of stacked memory cells is increased to achieve high degree of integration, then the storage capacity is improved, but the difficulty of connecting channel layer and source layer increases
Solution Approach 1:
The source layer is divided into multiple segments: first source seed layer, second source seed layer, and interlayer source layer. This segmentation allows each layer to be formed and connected independently, reducing the overall complexity of connecting channel layers through the entire stack.
Solution Approach 2:
The source layer connection is extended into the vertical dimension by forming the interlayer source layer between the first and second source seed layers. This three-dimensional approach allows channel layers to be connected at multiple levels rather than requiring a single continuous connection through the entire stack.
2Quantity of substance
If the number of stacked memory cells is increased to achieve high degree of integration, then the storage capacity is improved, but the stability of electrical characteristics of memory cell deteriorates
Solution Approach 1:
Dividing the source layer into multiple seeded layers allows for better control of electrical characteristics at each segment. The interlayer source layer acts as an intermediate connection that stabilizes the electrical path between channel layers, preventing degradation even as the total number of stacked cells increases.
Solution Approach 2:
The interlayer source layer serves as an intermediary structure between the first and second source seed layers, providing a stable electrical connection point. This intermediate layer ensures consistent electrical characteristics by mediating the connection between channel layers at different vertical positions.
3Ease of manufacture
If traditional source layer connection method is used, then the manufacturing process is simple, but the yield of semiconductor devices deteriorates
Solution Approach 1:
Source seed layers are formed in advance before the interlayer source layer is created. This preliminary action allows for precise positioning and preparation of connection points, ensuring that subsequent interlayer source layer formation achieves high-yield connections without requiring complex real-time adjustments.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, improves the yield of semiconductor devices, and ensures stable electrical characteristics by growing the interlayer source layer uniformly between the source seed layers, reducing void formation and growth time.
Implementation Method 1
growing an interlayer source layer from the channel layer exposed through the source area, the first source seed layer, and the second source seed layer
Data Source
AI summary
A semiconductor device includes a first source seed layer, a second source seed layer disposed over the first source seed layer while being spaced apart from the first source seed layer, a stacked structure formed on the second source seed layer, channel layers extending inside the first source seed layer by penetrating the stacked structure, and an interlayer source layer extending into a space between the first source seed layer and the second source seed layer while contacting each of the channel layers, the first source seed layer, and the second source seed layer.