Semiconductor Device Multi-Potential Substrate Segmentation
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Solution Overview
Problem
Existing semiconductor devices struggle to integrate transistors operating in voltage ranges above and below a reference potential on the same substrate, limiting the flexibility and efficiency of electronic circuits.
Innovation Solution
A semiconductor device design featuring a semiconductor substrate of a first conductivity type with an impurity layer of a second conductivity type, separating regions and providing wells of different conductivity types to allow for independent potential settings, enabling transistors to operate in various voltage ranges by using multiple terminals for potential supply.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single reference potential is supplied to the semiconductor substrate, then the structure is simple and easy to manufacture, but transistors operating in voltage ranges above and below the reference potential cannot coexist on the same substrate
Solution Approach 1:
The semiconductor substrate is divided into multiple potential regions (first potential region and second potential region) separated by a potential barrier structure. This segmentation allows different voltage ranges to coexist on the same substrate while maintaining electrical isolation between regions, enabling both transistors operating above and below the reference potential to function simultaneously.
Solution Approach 2:
A potential barrier structure (such as a pinned diode or junction isolation structure) is introduced as an intermediary element between different potential regions. This barrier structure enables independent potential control of adjacent regions while preventing unwanted current flow, thus allowing versatile voltage configurations without excessive complexity.
2Adaptability or versatility
If multiple potential regions are created to allow transistors operating above and below reference potential, then voltage range compatibility is improved, but the device structure becomes more complex
Solution Approach 1:
The substrate is segmented into distinct potential regions using diffusion barriers or pinned diode structures that are integrated into the standard CMOS fabrication process. This segmentation provides electrical isolation for different voltage domains while maintaining a relatively simple overall device structure that can be manufactured using conventional processes.
Solution Approach 2:
Different regions of the substrate are given different electrical characteristics (potential levels) through localized doping or barrier structures. This local quality differentiation allows each region to be optimized for specific voltage ranges while the rest of the substrate maintains its standard configuration, minimizing overall structural complexity.
3Adaptability or versatility
If regions are electrically isolated to enable independent potential control, then adaptability is improved, but leakage current between regions may increase
Solution Approach 1:
A potential barrier structure (such as a pinned diode with reverse-biased junctions) is introduced as an intermediary between potential regions. This barrier actively prevents leakage current by maintaining reverse bias conditions at the region interfaces, thus enabling independent potential control while suppressing unwanted current flow between regions.
Solution Approach 2:
Protective structures such as pinned diodes or reverse-biased junctions are pre-configured at the interfaces between potential regions to prevent leakage current before it can occur. These structures are designed to maintain reverse bias conditions under all operating conditions, providing proactive protection against leakage while enabling independent region control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design allows for the coexistence of transistors operating above and below the reference potential on the same substrate, expanding the potential range and reducing leakage current, thereby enhancing the functionality and efficiency of electronic circuits.
Implementation Method 1
an impurity layer of a second conductivity type provided within the semiconductor substrate, an impurity region of the second conductivity type that is connected, within the semiconductor substrate, to the impurity layer, and separates a first region of the semiconductor substrate from a second region by surrounding the first region of the semiconductor substrate together with the impurity layer
Implementation Method 2
the potential of the P-type semiconductor substrate is taken as the reference potential (0V), and a positive potential is supplied to an N-well provided in the P-type semiconductor substrate to reverse bias the P-N junction. Current can thereby be prevented from flowing toward the N-well from the P-type semiconductor substrate.
Data Source
AI summary
A semiconductor device includes a semiconductor substrate of a first conductivity type, an impurity layer of a second conductivity type provided within the semiconductor substrate, an impurity region of the second conductivity type that is connected, within the semiconductor substrate, to the impurity layer, and separates a first region of the semiconductor substrate from a second region by surrounding the first region of the semiconductor substrate together with the impurity layer, a first well and second well of the second conductivity type that are provided on the impurity layer via at least a semiconductor layer of the first conductivity type, and a plurality of transistors provided to the semiconductor substrate.