Semiconductor Device Multi-Test Signal Control
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Solution Overview
Problem
In semiconductor devices, the multi-test mode for detecting defective memory cells is inefficient due to simultaneous activation of multiple cell blocks, leading to inaccurate decision operations and increased testing time and costs.
Innovation Solution
A semiconductor device with a pre-selection signal generator, selection signal controller, and decision circuit that decodes addresses to generate and control pre-selection signals, ensuring non-overlapping active periods for selection signals, and uses stored repair information to accurately determine the status of cell blocks in a multi-test mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple cell blocks are simultaneously activated in multi-test mode, then testing speed is improved, but decision accuracy deteriorates due to signal overlap
Solution Approach 1:
The patent segments the simultaneous testing of multiple cell blocks into sequential phases by controlling selection signal timing. The test operation is divided into multiple test phases where cell blocks are activated in a controlled sequence rather than truly simultaneously, allowing the decision circuit to accurately determine repair status for each block without signal interference
Solution Approach 2:
The patent applies preliminary action by pre-controlling the timing and sequencing of selection signals before they reach the cell blocks. The selection signal controller prepares and sequences the activation signals in advance, ensuring that each cell block's selection signal is properly timed and non-overlapping with others, thereby preventing decision circuit errors before they occur
2Loss of time
If multiple cell blocks are simultaneously activated, then test time is reduced, but testing complexity increases due to signal coordination requirements
Solution Approach 1:
The patent introduces an intermediary component - the selection signal controller - that mediates between the test operation and the cell blocks. This controller manages the complexity of coordinating multiple selection signals by sequentially enabling them based on test phase, thereby reducing the overall system complexity while maintaining multi-block testing capability
3Productivity
If selection signals are simultaneously activated for multiple cell blocks, then parallel testing is achieved, but decision circuit operation becomes inaccurate
Solution Approach 1:
The patent applies dynamics by making the selection signal activation dynamic and phase-dependent rather than static and simultaneous. The selection signal controller dynamically adjusts which cell blocks receive activation signals based on the current test phase, ensuring that the decision circuit receives clear, non-overlapping signals while still enabling parallel testing across multiple phases
Data Source
AI summary
A semiconductor device includes a plurality of cell blocks activated in response to a plurality of selection signals, respectively, a pre-selection signal generator configured to generate a plurality of pre-selection signals corresponding to the cell blocks, respectively, and activate at least two of the pre-selection signals by decoding addresses in a multi-test mode, a selection signal controller configured to selectively activate the plurality of selection signals in response to the plurality pre-selection signals and control active periods of the activated selection signals so as not to overlap, and a decision circuit configured to decide whether or not the cell blocks activated in response to the activated selection signals are repaired in response to stored repair information and the plurality of selection signals.