Semiconductor Die Stacks With Multiple Substrates for Signal Routing

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Solution Overview

Problem

Conventional techniques for routing signals in vertically-stacked semiconductor devices result in reduced signal integrity, larger package sizes, and increased manufacturing costs due to complex multilayered routing structures within a single package substrate.

Innovation Solution

The use of multiple substrates for signal routing, where each die stack has its own dedicated substrate, allowing for physically and electrically isolated signal routing pathways, reducing the complexity and size of the package substrate and improving signal integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional multilayered routing structures within a single package substrate are used, then signal routing is achieved, but signal integrity deteriorates and package size increases

Engineering Contradiction:
Improvesignal integrityVSAvoidpackage size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent divides the signal routing function into separate substrates for each die stack. Instead of using a single complex multilayered substrate, each die stack has its own dedicated substrate with simplified routing, thereby improving signal integrity while reducing overall package size.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar routing within a single substrate to three-dimensional stacking with multiple substrates at different vertical levels. This dimensional change allows signals to be routed more directly between dies and their corresponding substrates, reducing signal path length and improving integrity without increasing package footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If conventional multilayered routing structures within a single package substrate are used, then signal routing is achieved, but device complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidrouting structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the routing structure into multiple independent substrates, each handling routing for a specific die stack. This eliminates the need for complex multilayered routing within a single substrate, as each substrate has simpler, dedicated routing paths, thereby reducing overall device complexity while maintaining signal integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts the routing function from a single complex substrate and distributes it across multiple simpler substrates. Each substrate is removed from the complexity burden, resulting in individually simpler routing structures that collectively achieve the required signal routing functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If conventional multilayered routing structures within a single package substrate are used, then signal routing is achieved, but manufacturing cost increases

Engineering Contradiction:
Improvesignal integrityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent segments the package into multiple substrates that can be manufactured independently using standard processes. This avoids the need for complex multilayered substrate manufacturing, which is costly and challenging. Each simpler substrate can be manufactured more easily and assembled into the final package, reducing overall manufacturing cost while maintaining signal integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates modular substrate-die stack assemblies that can be manufactured independently and then assembled. This modular approach allows for universal manufacturing processes to be applied to each module, improving manufacturing efficiency and reducing costs compared to custom multilayered substrate fabrication.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11562987B2Semiconductor devices with multiple substrates and die stacks
Publication Date: 2023.01.24 MICRON TECHNOLOGY INC
  • US11562987B2 patent drawing
  • US11562987B2 patent drawing
  • US11562987B2 patent drawing

AI summary

Semiconductor devices having multiple substrates and die stacks, and associated systems and methods, are disclosed herein. In some embodiments, a semiconductor device includes a package substrate, and a first die stack mounted on the package substrate and including a plurality of first memory dies. The device can include a substrate mounted on the first die stack, the substrate including a plurality of routing elements. The device can also include a second die stack mounted on the substrate, the second die stack including a plurality of second memory dies. The device can further include a controller die mounted on the substrate. The controller die can be configured to communicate with the second die stack via the routing elements of the substrate. The device can include a mold material encapsulating the first die stack, the second die stack, the substrate, and the controller die.