Semiconductor Patterning With Multi-Tone Masks to Cut Lithography Steps
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Solution Overview
Problem
The manufacturing process of semiconductor devices requires a reduction in the number of photolithography processes to lower costs and increase efficiency, as current methods are costly and time-consuming, especially with the high expense of photomasks for larger substrate generations.
Innovation Solution
A method that reduces the number of masks and photolithography processes by forming a mask with regions of different thicknesses, allowing for simultaneous etching and mask recession steps to minimize the number of photolithography steps required, thereby reducing manufacturing time and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography processes are used with multiple masks, then manufacturing precision can be maintained, but the number of photolithography steps increases significantly, leading to higher costs and longer manufacturing time
Solution Approach 1:
The patent merges multiple photolithography steps into a single step by using a multi-tone mask that defines multiple patterns simultaneously. The mask includes a first region for forming source/drain electrodes and a second region for forming a cap electrode, both created in one exposure and development process, thereby reducing the total number of photolithography steps while maintaining the required manufacturing precision
Solution Approach 2:
The patent introduces a new dimension to the mask structure by creating a multi-tone mask with regions of different optical densities or thicknesses. This dimensional change in the mask (from single-tone to multi-tone) enables single-step formation of multiple electrode patterns that would traditionally require separate photolithography processes
2Area of stationary object
If the number of photomasks is increased for larger substrate generations, then coverage of larger areas is achieved, but the manufacturing cost increases significantly
Solution Approach 1:
The patent combines multiple mask functions into a single multi-tone mask that can define multiple electrode patterns across the substrate in one step. This merging approach reduces the total number of masks required, thereby lowering the manufacturing cost while still achieving complete coverage of larger substrate areas
Solution Approach 2:
The multi-tone mask serves multiple functions simultaneously: it defines source/drain electrodes in the first region and cap electrodes in the second region, acting as a universal mask that replaces what would traditionally require multiple specialized masks for different electrode formations
3Device complexity
If multiple photolithography steps are performed, then complex electrode patterns are formed, but the manufacturing time increases
Solution Approach 1:
The patent merges the formation of multiple complex electrode patterns into a single photolithography step using a multi-tone mask. The simultaneous definition of source/drain electrodes and cap electrodes in one exposure and development cycle dramatically reduces the manufacturing time while maintaining the required pattern complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively decreases the number of masks and photolithography processes, lowering the manufacturing time and cost of semiconductor devices while maintaining reliability and yield.
Implementation Method 1
portions of the first insulating film and portions of the second insulating film that the mask does not overlap are removed
Data Source
AI summary
The number of masks and photolithography processes used in a manufacturing process of a semiconductor device are reduced. A first conductive film is formed over a substrate; a first insulating film is formed over the first conductive film; a semiconductor film is formed over the first insulating film; a semiconductor film including a channel region is formed by etching part of the semiconductor film; a second insulating film is formed over the semiconductor film; a mask is formed over the second insulating film; a first portion of the second insulating film that overlaps the semiconductor film and second portions of the first insulating film and the second insulating film that do not overlap the semiconductor film are removed with the use of the mask; the mask is removed; and a second conductive film electrically connected to the semiconductor film is formed over at least part of the second insulating film.