Semiconductor Module with Nested Busbars for Inductance Reduction
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Solution Overview
Problem
Conventional semiconductor modules for electric power face challenges in miniaturizing module size and reducing wiring inductance, leading to increased size and inefficiency due to wide busbar configurations that fail to sufficiently lower inductance.
Innovation Solution
The semiconductor module design features multiple frames and metal electric-conductor-islands with specific connections and orientations to minimize inductance, using insulating materials and overlapping busbars to reduce inductance while maintaining heat dissipation and electrical insulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Weight of stationary object
If the busbar configuration is made wide to reduce inductance, then the inductance value is reduced, but the module size increases
Solution Approach 1:
The patent implements a nested busbar structure where the first busbar is positioned directly above the second busbar in the vertical direction, creating an overlapping configuration. This nesting approach allows the busbars to occupy the same horizontal footprint while maintaining electrical separation, thereby reducing inductance without increasing the module's planar area.
Solution Approach 2:
The patent transitions from a conventional planar busbar arrangement to a three-dimensional overlapping configuration. By utilizing the vertical dimension to position busbars at different heights (first busbar above second busbar), the design achieves reduced inductance through increased separation distance in the vertical axis without expanding the horizontal module footprint.
2Power
If multiple chips are mounted to increase electric current capacity, then the electric current capacity is increased, but the package size increases due to larger inductance
Solution Approach 1:
The nested busbar configuration allows multiple power paths to be stacked vertically, enabling increased current capacity through parallel chip mounting without proportionally increasing the package area. The overlapping busbars create compact current return paths that maintain low inductance even as power capacity scales.
Solution Approach 2:
By arranging busbars in the vertical dimension rather than spreading them horizontally, the patent enables higher current capacity through multiple chips while maintaining a compact package footprint. The vertical stacking of busbars creates efficient current loops that minimize inductance regardless of the number of parallel chips mounted.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively miniaturizes the semiconductor module size, reduces wiring inductance, and enhances reliability by improving bonding and heat management, making it more resistant to noise and temperature variations.
Implementation Method 1
By arranging that the positive-electrode side inner-part-electrode 71 of the busbar and the negative-electrode side inner-part-electrode 72 of the busbar face each other and adopting a configuration such that the electric currents of each other flow in reverse orientations, a reducing effect of the inductance is being contemplated.
Data Source
AI summary
Included are: the third frame which is electrically connected to the first intermediate frame and is arranged above the first frame; the fourth frame which is electrically connected to the second intermediate frame and is arranged above the second frame; the electric source terminal part which is provided on an extension of the first frame; the ground terminal part which is provided on an extension of the fourth frame; and the output terminal part which is provided on an extension to which the second frame and the third frame are electrically joined, wherein the third frame and the fourth frame are arranged in parallel with each other, and the electric source terminal part, the ground terminal part and the output terminal part are arranged in a manner such that induced electric voltages, which are generated in the third frame and the fourth frame, become in reverse directions with each other.