Semiconductor Noise Elimination Circuit for PVT-Induced Glitches
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Solution Overview
Problem
Conventional semiconductor level signal processing circuits are prone to generating noise or glitches due to variations in PVT (process/voltage/temperature) conditions, leading to erroneous initialization and output signal levels.
Innovation Solution
A noise elimination circuit comprising a pulse generation unit to detect signal transitions and generate preliminary pulse signals, and an error elimination unit, such as a low pass filter or slicer, to eliminate noise and ensure correct pulse signal output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional level signal processing circuits are used, then the circuit structure is simple, but noise or glitches are generated due to PVT variations
Solution Approach 1:
The patent introduces a pulse generation unit as an intermediary component between the level signal processing circuit and the flip-flop. This unit generates preliminary pulse signals that mediate the control signal transmission, allowing for noise detection and elimination before the signal reaches the flip-flop, thus improving signal accuracy without significantly increasing overall circuit complexity
Solution Approach 2:
The patent implements a feedback mechanism where the pulse generation unit monitors the level signal for noise or glitches, and the error elimination unit provides feedback by eliminating detected errors. This feedback loop ensures that only clean, accurate pulse signals are transmitted to the flip-flop, resolving the contradiction between simple circuit structure and signal accuracy
2Adaptability or versatility
If the output signals have different timing due to PVT variations, then the circuit can handle timing variations, but noise or glitches are generated in the level signal
Solution Approach 1:
The patent applies preliminary action by generating preliminary pulse signals in advance before they are needed by the flip-flop. The pulse generation unit creates these signals with proper timing relationships established beforehand, and the error elimination unit prepares to remove any noise that may have been generated during the timing variations, preventing noise from reaching the output stage
Solution Approach 2:
The patent converts the harmful effect of timing variations that generate noise into a benefit by using the pulse generation unit to detect these variations and generate corresponding preliminary pulse signals. The error elimination unit then uses this information to selectively eliminate only the noisy portions while preserving the valid signal transitions, thus converting the timing variation problem into an opportunity for improved signal conditioning
3Loss of information
If noise is present in the level signal, then the signal can carry information, but erroneous initialization occurs in the flip-flop
Solution Approach 1:
The pulse generation unit serves as an intermediary that receives the level signal containing information and noise, processes it to generate preliminary pulse signals, and passes only the cleaned signals to the flip-flop. This intermediary function preserves the information-carrying capability of the signal while filtering out the noise that would cause erroneous initialization
Solution Approach 2:
The error elimination unit extracts and removes the noise components from the preliminary pulse signals while retaining the valid signal transitions that carry the intended information. This extraction process separates the harmful noise from the useful signal, ensuring that only clean information-bearing signals are used for flip-flop initialization
Data Source
AI summary
A semiconductor apparatus includes a pulse generation unit configured to detect a transition of an input signal and generate a preliminary pulse signal, and an error elimination unit configured to determine error of the preliminary pulse signal and output a signal as a pulse signal.