Semiconductor Device With Non-Uniform Die Pad Thickness
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Solution Overview
Problem
Semiconductor devices with multiple chips face reliability issues due to heat transfer and size constraints, where the heat generated by power transistors can affect control chips, and existing designs either increase device size or compromise reliability.
Innovation Solution
A semiconductor device design with a die pad having a thinner portion for power transistors and a thicker portion for control chips, where the power transistors are mounted on the thinner portion and control chips on the thicker portion, facilitating efficient heat dissipation and reducing temperature rise in control chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple semiconductor chips are mounted on a chip mounting portion, then the device can integrate more functions, but heat from power transistors affects control chips reducing reliability
Solution Approach 1:
The chip mounting portion is designed with non-uniform thickness, creating different thermal zones: a thinner region for power transistors that generate heat and a thicker region for control chips that are heat-sensitive. This local differentiation allows each chip type to be positioned in the optimal thermal environment, enabling functional integration while protecting reliability.
2Reliability
If the chip mounting portion is made thicker to protect control chips, then reliability improves, but device size increases
Solution Approach 1:
Rather than uniformly increasing the thickness of the entire chip mounting portion, the invention applies thickness differentiation locally: the mounting portion is thicker only in the region where control chips are mounted to provide thermal protection, while remaining thinner in power transistor regions. This localized approach protects control chips without proportionally increasing overall device volume.
3Volume of moving object
If the chip mounting portion is made thinner to reduce device size, then volume constraints are satisfied, but heat dissipation capability is reduced
Solution Approach 1:
The chip mounting portion implements spatially varying thickness to simultaneously satisfy conflicting thermal and size requirements: thinner regions provide adequate heat dissipation for power transistors while thicker regions provide thermal insulation for control chips. This local differentiation enables the device to meet volume constraints while maintaining appropriate heat management for different chip types.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the reliability and performance of semiconductor devices by effectively dissipating heat from power transistors and minimizing temperature rise in control chips, thereby improving overall device reliability and reducing size constraints.
Implementation Method 1
The thickness of the portion of the chip mounting portion over which the first semiconductor chip is mounted is smaller than the thickness of the portion of the chip mounting portion over which the second semiconductor chip is mounted
Data Source
AI summary
An improvement is achieved in the reliability of a semiconductor device. Over a die pad, first and second semiconductor chips are mounted. The first and second semiconductor chips and a part of the die pad are sealed in a sealing portion. The first semiconductor chip includes a power transistor. The second semiconductor chip controls the first semiconductor chip. The thickness of the portion of the die pad over which the first semiconductor chip is mounted is smaller than the thickness of the portion of the die pad over which the second semiconductor chip is mounted.