Semiconductor device

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Solution Overview

Problem

Depletion transistors in driver circuits of display devices cannot be turned off effectively, leading to malfunction and reduced operating frequency range, and high driving voltage causes transistor degradation.

Innovation Solution

A semiconductor device configuration that includes specific transistors and a capacitor to generate an offset signal, allowing the transistor to be turned off even when it is a depletion transistor, thereby reducing drain current and suppressing voltage stress on transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a depletion transistor is used in the driver circuit, then the transistor can maintain conduction at Vgs of 0 V, but the transistor cannot be turned off effectively, leading to circuit malfunction and reduced operating frequency range

Engineering Contradiction:
Improvetransistor conduction stabilityVSAvoidtransistor switching capability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The invention applies preliminary action by proactively reducing the gate voltage below the threshold voltage before the transistor can malfunction. The fourth transistor actively drives the gate voltage negative when the third transistor turns off, ensuring the depletion transistor is reliably turned off and preventing the inability to switch that causes circuit malfunction and frequency limitations

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the voltage parameter by applying a negative voltage to the gate of the depletion transistor through the fourth transistor. This parameter change (making Vgs negative) actively turns off the depletion transistor, resolving the contradiction between maintaining conduction stability at 0V and achieving effective switching off capability

Inventive Principle:
Principle #35Parameter changes

2Reliability

If high driving voltage is applied to turn on transistors M2 and M3, then the transistors can conduct properly, but the high Vgs promotes degradation of the transistors and may cause malfunction

Engineering Contradiction:
Improvetransistor conductionVSAvoidtransistor lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The invention applies periodic action by using the fifth transistor to periodically supply a negative voltage to the gate of the depletion transistor during specific operation periods. This periodic negative voltage application reduces Vgs during critical phases, minimizing degradation while maintaining proper conduction during required periods, thus extending transistor lifespan without sacrificing conduction reliability

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Prevents malfunction and degradation of transistors by ensuring the transistor can be turned off and reducing voltage stress, even when operating as a depletion transistor, thus stabilizing circuit operation and extending transistor lifespan.

Implementation Method 1

a bootstrap operation in which the potential of the gate of the transistor M1 is increased to be higher than a potential VDD by using capacitive coupling of the capacitor C1

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS9508301B2Semiconductor device
Publication Date: 2016.11.29 SEMICON ENERGY LAB CO LTD
  • US9508301B2 patent drawing
  • US9508301B2 patent drawing
  • US9508301B2 patent drawing

AI summary

Provided is a semiconductor device which can operate stably even in the case where a transistor thereof is a depletion transistor. The semiconductor device includes a first transistor for supplying a first potential to a first wiring, a second transistor for supplying a second potential to the first wiring, a third transistor for supplying a third potential at which the first transistor is turned on to a gate of the first transistor and stopping supplying the third potential, a fourth transistor for supplying the second potential to the gate of the first transistor, and a first circuit for generating a second signal obtained by offsetting a first signal. The second signal is input to a gate of the fourth transistor. The potential of a low level of the second signal is lower than the second potential.