Semiconductor Offset Spacer Material Selection for Reliability
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Solution Overview
Problem
The existing manufacturing techniques for semiconductor devices face challenges in forming offset spacers for MONOS type transistors and HKMG-MISFETs, as silicon oxide spacers can introduce oxygen into gate insulating films, causing variations, while silicon nitride spacers can trap charges and increase threshold voltage, degrading transconductance and read-out current.
Innovation Solution
The use of different materials for offset spacers in MONOS type transistors and HKMG-MISFETs, where silicon oxide is used to contact the charge storage film in transistors and silicon nitride is used to contact the high dielectric constant film, preventing oxygen entry and charge trapping, thereby improving device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon oxide is used as offset spacer material for MONOS type transistor, then charges can be stored in the offset spacer improving memory function, but threshold voltage increases degrading transconductance and read-out current
Solution Approach 1:
The patent applies different materials for offset spacers in different device regions: silicon oxide is used for MONOS type transistor offset spacers to enable charge storage, while silicon nitride is used for HKMG-MISFET offset spacers to prevent charge trapping. This local differentiation resolves the contradiction by optimizing each device type's specific requirements without compromising the other.
2Manufacturing precision
If silicon nitride is used as offset spacer material for HKMG-MISFET, then oxygen entry into gate insulating film is prevented, but charge trapping occurs increasing threshold voltage
Solution Approach 1:
The patent differentiates offset spacer materials by device type: silicon nitride is specifically used for HKMG-MISFET offset spacers to prevent oxygen entry and maintain gate insulating film characteristics, while silicon oxide is used for MONOS type transistors where charge storage is desired. This localized material selection resolves the contradiction by matching material properties to specific device requirements.
3Ease of manufacture
If same offset spacer material is used for both MONOS type transistor and HKMG-MISFET, then manufacturing process is simplified, but device performance degrades due to material incompatibility
Solution Approach 1:
The patent implements different offset spacer materials (silicon oxide for MONOS, silicon nitride for HKMG-MISFET) in different device regions to optimize performance. This is achieved through selective formation processes that deposit or grow the appropriate material in each region, balancing manufacturing complexity with device performance requirements.
Solution Approach 2:
The patent employs a composite approach where different insulating materials are used in different locations within the same semiconductor device structure. This allows the system to leverage the charge storage capability of silicon oxide for MONOS transistors while utilizing the oxygen barrier properties of silicon nitride for HKMG-MISFETs, achieving optimal performance for each device type.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the performance of both non-volatile memory and HKMG-MISFET by suppressing threshold voltage increases and maintaining read-out current, reducing variations in gate insulating film characteristics and improving data holding reliability.
Implementation Method 1
oxygen originating from the silicon oxide film that forms the offset spacer may enter a gate insulating film when a heat treatment for impurity activation is performed
Implementation Method 2
the silicon nitride film has a charge storage function, and hence there is the possibility that a hot electron, generated when a writing operation is performed, may be trapped by the offset spacer including the silicon nitride film
Data Source
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AI summary
A semiconductor device whose performance is improved is disclosed. In the semiconductor device, an offset spacer (OS1) formed in a memory cell (MC1) is formed by a laminated film of a silicon oxide film (OXF1) and a silicon nitride film (SNF1), and the silicon oxide film is particularly formed to directly contact the sidewall of a memory gate electrode (MG) and the side end portion of a charge storage film (ECF); on the other hand, an offset spacer (OS2) formed in a MISFET in a peripheral region (PER) is formed by a silicon nitride film (SNF1). Particularly in the MISFET, the silicon nitride film directly contacts both the sidewall of a gate electrode (G1) and the side end portion of a high dielectric constant film (HK).