Semiconductor Device with Organic Substrate and Inverted Terminals

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing semiconductor device manufacturing process is costly and complex due to the use of a silicon layer as a support layer, which requires expensive etching techniques and results in short-circuiting issues, and the high precision flip chip mounting process reduces manufacturing yield and increases costs.

Innovation Solution

A semiconductor device design where the first semiconductor element is mounted face-up on a support substrate, with external connection terminals and a connection electrode formed on the insulating material, allowing for a simplified manufacturing process and improved reliability by eliminating the need for through vias and reducing the risk of short-circuiting, while enabling high-density wiring and precise alignment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a silicon layer is used as the support layer and through electrodes are formed using silicon etching or RIE, then the through electrodes can be formed to connect semiconductor elements, but the manufacturing cost increases and the process becomes complex

Engineering Contradiction:
Improveconnection reliabilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the support layer function from the silicon substrate and transfers it to an organic substrate. The silicon layer is removed entirely, and only the necessary wiring and electrode structures are retained on the organic substrate, simplifying the manufacturing process while maintaining connection reliability

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the expensive silicon support layer with a cheaper organic substrate that serves the same structural and electrical support functions. The organic substrate is designed to be removed or dissolved after serving its purpose during manufacturing, reducing overall device cost and complexity

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Ease of manufacture

If conductor through holes are formed on the wiring member in advance and the support substrate is removed after mounting semiconductor elements, then the through electrodes can be exposed, but fine metal fragments scatter on the resin surface causing short-circuiting

Engineering Contradiction:
Improvethrough electrode formationVSAvoidelectrode isolation
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent performs preliminary isolation of conductor through holes with insulating material before mounting semiconductor elements. This preliminary action prevents metal fragment contamination and short-circuiting during subsequent manufacturing steps, ensuring electrode reliability without complicating the process

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies insulating material to cushion and protect the conductor through holes and metal fragments before they can cause short-circuiting. This protective layer acts as a barrier that prevents harmful interactions between metal fragments and conductive paths during the manufacturing process

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If semiconductor elements are mounted on the electrode forming surface where solder balls are formed, then external connection terminals are established, but the height of solder balls must be increased and terminal pitch cannot be reduced

Engineering Contradiction:
Improveexternal connection reliabilityVSAvoidterminal arrangement density
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent separates the semiconductor element mounting surface from the external connection terminal forming surface. Semiconductor elements are mounted on one surface while external connection terminals are formed on the opposite surface, allowing independent optimization of both functions without interfering with each other's spatial requirements

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent inverts the conventional approach by forming external connection terminals on the opposite surface to where semiconductor elements are mounted. This inversion allows the use of standard solder ball heights and enables finer terminal pitch without compromising connection reliability

Inventive Principle:
Principle #13The other way round (Inversion)

4Manufacturing precision

If high precision flip chip mounting is conducted twice to mount semiconductor elements on opposite surfaces, then through electrodes can be arranged at fine pitch, but manufacturing yield decreases and time is increased

Engineering Contradiction:
Improvemounting precisionVSAvoidmanufacturing efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent performs preliminary formation of connection electrodes and wiring structures on the organic substrate before mounting semiconductor elements. This preliminary preparation simplifies subsequent mounting operations, reducing the need for repeated high-precision alignment and improving manufacturing efficiency

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts the complex dual-sided high-precision mounting process by using an organic substrate that allows for simplified electrode formation and connection. The organic substrate serves as a temporary platform that facilitates easier assembly and reduces the stringency of precision requirements

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8916976B2Semiconductor device and method of manufacturing the same
Publication Date: 2014.12.23 RENESAS ELECTRONICS CORP
  • US8916976B2 patent drawing
  • US8916976B2 patent drawing
  • US8916976B2 patent drawing

AI summary

First semiconductor element 1 being buried in first insulating material 2; second semiconductor element 5 being covered by second insulating material 6; connection electrode 4 being buried in first insulating material 2 arranged between circuit surface of first semiconductor element 1 and circuit surface of second semiconductor element 5; external connection terminal 8 being arranged on lower surface of first insulating material 2 facing in the same direction as lower surface of first semiconductor element 1 opposite to circuit surface thereof; connection electrode 4 forming a part of path for electrically connecting circuit surface of first semiconductor element 1 and circuit surface of second semiconductor element 5 to each other; first semiconductor element 1 and external connection terminal 8 being electrically connected to each other by way of wire 3 and via 7 passing through region of insulating layer other than region thereof burying connection electrode 4.