Semiconductor Output Buffer Voltage Path Impedance Control
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Solution Overview
Problem
In semiconductor devices like DRAM, the power supply paths to data output buffers have resistance variations that lead to impedance differences, affecting data output efficiency and requiring smaller resistance in voltage supply paths to manage high current flows.
Innovation Solution
The arrangement of data and voltage pads with corresponding transistors and contact plugs ensures uniform resistance in voltage supply paths by sandwiching data pads between voltage pads, with contact plugs connecting these paths to maintain consistent impedance across output buffers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If data output buffers are provided with large drive capacity to output data externally, then data output capability is improved, but current consumption increases and requires power supply paths with smaller resistance
Solution Approach 1:
The voltage supply path is segmented into multiple parallel paths, each serving specific output buffers. This segmentation allows current to be distributed across multiple paths, reducing the resistance burden on any single path while maintaining the large drive capacity needed for data output.
Solution Approach 2:
Multiple voltage supply paths are merged at the voltage pad level, where they converge to provide combined current supply to the output buffers. This merging approach consolidates the power delivery capability while maintaining low resistance through parallel path architecture.
2Productivity
If voltage pads are arranged to supply voltage to multiple output buffers, then power supply efficiency is improved, but resistance differences between multiple current supply paths increase
Solution Approach 1:
The voltage pads and their associated contact plugs are arranged to create equipotential regions, ensuring that all output buffers receive voltage at the same potential level. This arrangement minimizes resistance differences between parallel current supply paths by equalizing the electrical potential across the power distribution network.
Solution Approach 2:
The patent applies different arrangement strategies to different regions of the power supply network. Voltage pads are positioned and dimensioned according to their local requirements, with contact plugs strategically placed to optimize resistance characteristics for each specific current supply path while maintaining overall uniformity.
Data Source
AI summary
An apparatus includes first and second data pads arranged adjacently to each other in a first direction without an intervention of a pad therebetween, first and second output transistors coupled correspondingly to the first and second data pads and arranged adjacently to each other in the first direction and at least one contact plug through which a voltage is supplied to each of the first and second output transistors. The at least one contact plug is arranged between the first and second output transistors.