Semiconductor Output Circuit With Frequency-Adaptive Jitter Control

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Solution Overview

Problem

Conventional semiconductor output circuits experience jitter due to limited swing width of output signals, particularly at high frequencies, caused by high capacitance at the output node, which restricts the voltage span and affects signal quality.

Innovation Solution

An output circuit with a signal selector and an output level controller that detects the frequency characteristics of the output signal and adjusts the voltage level to reduce swing width, ensuring that low-frequency signals are raised to a higher voltage level and lowered to a lower voltage level, thereby reducing the difference in swing width between low and high frequency signals, thus minimizing jitter.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If high capacitance is present at the output node, then the circuit can drive high-frequency signals, but the swing width of the output signal is limited

Engineering Contradiction:
Improveoutput signal frequencyVSAvoidswing width limitation
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The output level controller pre-adjusts the voltage level of the output signal before it reaches the high-capacitance node. By preliminarily controlling the voltage level based on frequency detection, the signal maintains adequate swing width even when driving high-frequency outputs with high capacitance load.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The circuit employs frequency detection feedback to monitor the output signal characteristics and dynamically adjust the voltage level through the output level controller. This feedback mechanism enables the system to adapt to different operating conditions and maintain optimal swing width across various frequency ranges.

Inventive Principle:
Principle #23Feedback

2Productivity

If the output circuit operates at high speed, then productivity is improved, but jitter increases due to limited swing width

Engineering Contradiction:
Improveoperational speedVSAvoidsignal stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The output level controller performs preliminary voltage level adjustment before the signal undergoes high-speed transitions. This pre-adjustment ensures that the signal maintains sufficient swing width even during high-speed operation, thereby reducing jitter and improving signal stability without sacrificing productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The circuit dynamically changes the voltage level parameter of the output signal based on detected frequency characteristics. By adjusting the voltage level in response to operating conditions, the system maintains optimal signal quality and reduces jitter during high-speed operation.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If voltage level is increased for low-frequency signals, then swing width is improved, but power consumption increases

Engineering Contradiction:
Improveswing widthVSAvoidpower consumption
Core Design Contradiction:
Object-affected harmful factorsVSUse of energy by moving object

Solution Approach 1:

The output level controller dynamically adjusts the voltage level based on the detected frequency characteristics of the output signal. For low-frequency signals, the voltage level is increased to improve swing width, while for high-frequency signals, the voltage level is maintained at appropriate levels. This dynamic adjustment optimizes power consumption while maintaining signal quality across different operating conditions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7924060B2Output circuit of semiconductor device
Publication Date: 2011.04.12 SK HYNIX INC
  • US7924060B2 patent drawing
  • US7924060B2 patent drawing
  • US7924060B2 patent drawing

AI summary

An output circuit of a semiconductor device includes a signal selector configured to receive first and second input data signals and sequentially outputting the first and second input data signals in response to a phase signal; and an output level controller configured to control a voltage level of an output signal of the signal selector based on the first and second input data signals.