Semiconductor Device Overlapping Well Region Doping Gradient
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Solution Overview
Problem
The integration of high voltage/power devices and low voltage logic devices on a single chip is complex and costly, with challenges in enhancing breakdown voltage and device performance due to the short drift region in extended drain metal oxide semiconductor (EDMOS) devices, making it difficult to raise breakdown voltage while lowering specific on-resistance.
Innovation Solution
A semiconductor device design featuring a substrate with a first and second well region, an overlapping region with a gradually decreasing net doping concentration, and a gate insulating layer, along with a source and drain region, where the overlapping region has a width of 0.2 μm to 0.7 μm and a doping profile that varies vertically, and a shallow trench isolation region, allowing for improved electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the drift region length is extremely short, then device speed is improved, but breakdown voltage cannot be raised
Solution Approach 1:
The patent applies local quality by creating an overlapping region with gradually decreasing net doping concentration between the first and second well regions. This localized doping gradient in the drift region allows the structure to simultaneously support high electric fields (for high breakdown voltage) while maintaining short length (for high speed), as the gradual transition reduces field concentration at abrupt junctions.
2Reliability
If the drift region length is extremely short, then device performance is improved, but specific on-resistance cannot be lowered
Solution Approach 1:
The patent employs parameter changes by optimizing the net doping concentration gradient in the overlapping region and controlling the ratio of the first well region length to gate electrode length between 80%-96%. These parameter optimizations allow the short drift region to achieve low specific on-resistance while maintaining high device performance, as the gradual doping transition reduces carrier scattering and improves conductivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances device performance, breakdown voltage, and reduces specific on-resistance by optimizing the doping concentration and profile, leading to improved electrical characteristics and increased current drivability.
Implementation Method 1
A net doping concentration in the overlapping region gradually decreases from a boundary between the first well region and the overlapping region to a boundary between the second well region and the overlapping region
Data Source
AI summary
A high voltage/power semiconductor device using a low voltage logic well is provided. The semiconductor device includes a substrate, a first well region formed by being doped in a first location on a surface of the substrate, a second well region formed by being doped with impurity different from the first well region's in a second location on a surface of the substrate, an overlapping region between the first well region and the second well region where the first well region and the second well region substantially coexist, a gate insulating layer formed on the surface of the first and the second well regions and the surface of the overlapping region, a gate electrode formed on the gate insulating layer, a source region formed on an upper portion of the first well region, and a drain region formed on an upper portion of the second well region. The semiconductor device may also include a separating unit, which is formed in the second well region on the drain side and may be formed as a shallow trench isolation (STI) region having a lower depth than the second well region.