Semiconductor Overlay Mark Structure for Accurate Overlay Measurement
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Solution Overview
Problem
The existing photolithography processes in semiconductor manufacturing face challenges in accurately measuring overlay errors due to interference from blocking layers, leading to inaccurate overlay error calculations and alignment issues.
Innovation Solution
A semiconductor structure is designed with a blocking layer positioned between functional patterns, where the vertical distance between overlay marks is greater than that between functional patterns, minimizing light interference and ensuring an asymmetrical light intensity distribution for accurate overlay error measurement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a blocking layer is positioned between functional patterns to block light, then light interference is reduced, but the vertical distance requirement complicates the structure design
Solution Approach 1:
The patent positions overlay marks at different vertical distances from the blocking layer compared to functional patterns. By utilizing the vertical dimension (z-axis) in addition to horizontal positioning, the overlay marks experience different light path conditions than functional patterns, enabling accurate overlay measurement while maintaining proper light blocking for functional areas.
Solution Approach 2:
The patent applies different vertical positioning strategies to different components: functional patterns are positioned at one vertical distance from the blocking layer, while overlay marks are positioned at a different vertical distance. This local differentiation allows each component to fulfill its specific function - functional patterns receive proper light blocking while overlay marks enable accurate measurement.
2Manufacturing precision
If multiple photolithography processes are used to achieve overlay, then alignment is improved, but measurement of overlay error becomes more difficult due to blocking layer interference
Solution Approach 1:
The patent introduces overlay marks as intermediary elements that facilitate measurement. These marks are positioned at a specific vertical distance from the blocking layer, creating an intermediate measurement reference that allows accurate overlay error detection without being directly affected by the light blocking intended for functional patterns.
Solution Approach 2:
By positioning overlay marks at a different vertical distance from the blocking layer than functional patterns, the patent creates a measurement dimension that is decoupled from the functional light blocking. This vertical dimension differentiation enables clear measurement signals for overlay error detection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This structure enables precise overlay error measurement by maintaining strong light intensity for diffraction signals, thereby improving alignment accuracy and electrical properties of semiconductor structures and memories.
Implementation Method 1
maintaining strong light intensity for diffraction signals
Data Source
AI summary
A semiconductor structure, a method for manufacturing the same and a memory are provided. The semiconductor structure at least includes two photolithography layers which are arranged in sequence and at least one blocking layer. Each photolithography layer includes a functional pattern and an overlay mark, and the photolithography layers include a first photolithography layer and a second photolithography layer. The first photolithography layer includes a first functional pattern and a first overlay mark, and the second photolithography layer includes a second functional pattern and a second overlay mark; and at least one blocking layer. The blocking layer is located between the first functional pattern and the second functional pattern, and a vertical distance between the first functional pattern and the second functional pattern is greater than a vertical distance between the first and second overlay marks, in a stacking direction of the photolithography layers.


