Semiconductor Device with 3D Capacitor and Oxide Transistor
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Solution Overview
Problem
Current semiconductor devices face challenges in miniaturization, integration, low power consumption, and high reliability, particularly in achieving low off-state current and high on-state current with favorable electrical characteristics while maintaining high productivity and design flexibility.
Innovation Solution
A semiconductor device is designed with a structure that includes oxide semiconductors, specific insulators, and conductors arranged to reduce parasitic capacitance and enhance contact resistance, utilizing a plug connected to the oxide semiconductor and insulators to increase the side surface area of capacitors, allowing for high-density integration and efficient electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If transistors are miniaturized and highly integrated, then device performance and reduction in size are improved, but manufacturing precision and electrical characteristics become harder to maintain
Solution Approach 1:
The patent transitions from planar capacitor structures to three-dimensional structures by forming capacitors on the side surfaces of conductors. This vertical utilization of space increases capacitance without increasing the projected area, enabling miniaturization while maintaining electrical performance through enhanced capacitive coupling in the vertical dimension.
Solution Approach 2:
The patent implements nested structures where insulators are formed around conductors, and capacitors are embedded within the insulator matrix. The plug structure nests multiple functional elements (oxide semiconductor, insulators, conductor) in a compact vertical arrangement, achieving high integration density while maintaining precise electrical characteristics.
2Volume of moving object
If transistors are miniaturized, then device size is reduced, but off-state current control becomes more difficult
Solution Approach 1:
The patent employs composite material structures with oxide semiconductors combined with specific insulator materials. The oxide semiconductor provides favorable electrical characteristics including low off-state current, while the composite structure with insulators forms precise interfaces that control carrier behavior, maintaining reliability even in miniaturized transistors.
3Reliability
If capacitor side surface area is increased, then capacitance is improved, but device area occupation increases
Solution Approach 1:
The patent resolves this contradiction by forming capacitors on the vertical side surfaces of conductors rather than only on horizontal surfaces. This three-dimensional capacitor configuration increases the effective capacitance area without increasing the device's projected footprint, achieving high capacitance in a compact area through vertical space utilization.
Data Source
AI summary
A semiconductor device enabling high integration is provided. The semiconductor device includes a plug, two capacitors, and two transistors sharing one oxide semiconductor. Each of the transistors includes a stacked-layer structure of a gate insulator and a gate electrode over the oxide semiconductor and an insulator in contact with a side surface of the gate electrode. An opening between the two gate electrodes exposes the insulators in contact with the side surfaces of the gate electrodes, and the plug is in the opening. The capacitor is directly provided over the oxide semiconductor. The side surface area of the capacitor is larger than the projected area of the capacitor.