Semiconductor Device p+-Type Region Current Filament Redirection
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Solution Overview
Problem
Semiconductor devices with integrated RC-IGBT and FWD face challenges in maintaining high avalanche resistance, leading to potential thermal runaway and device destruction due to current filaments.
Innovation Solution
Incorporating a p+-type semiconductor region between collector and cathode regions, electrically connected to emitter electrodes, which redirects current filaments away from FWD regions, enhancing avalanche resistance and suppressing signal delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a p+-type semiconductor region is added between collector and cathode regions to redirect current filaments, then avalanche resistance is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by creating a p+-type semiconductor region with higher impurity concentration specifically in the area between collector and cathode regions where current filament redirection is needed. This localized modification with different electrical properties (higher doping concentration) enables the structure to redirect current filaments away from FWD regions during avalanche breakdown, improving avalanche resistance without requiring comprehensive structural changes throughout the entire device.
2Reliability
If current filament redirection is implemented to suppress thermal runaway, then reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs parameter changes by modifying the impurity concentration parameter to create a p+-type semiconductor region with higher doping levels than surrounding regions. This parameter modification (increased impurity concentration) fundamentally changes the electrical characteristics of the region, enabling it to attract and redirect current filaments during avalanche breakdown. The solution achieves thermal runaway suppression through this material parameter change rather than requiring complex geometric precision or multiple processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The configuration effectively suppresses local temperature increases and current filament movement to FWD regions, reducing the likelihood of thermal runaway and improving semiconductor device reliability by enhancing avalanche resistance.
Implementation Method 1
This semiconductor device desirably has a high avalanche resistance
Implementation Method 2
a p+-type semiconductor region (14) electrically connected to emitter electrodes (31)
Data Source
AI summary
According to one embodiment, a semiconductor device includes a first electrode, first regions, second regions, an eighth semiconductor region, a ninth semiconductor region of the second conductivity type, a tenth semiconductor region, second electrodes, and a third electrode. Each first region includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, and a gate electrode. The first regions and the second regions alternate in the second direction. Each of the second regions includes a fifth semiconductor region, a sixth semiconductor region, and a seventh semiconductor region. The eighth semiconductor region is provided between the first semiconductor regions and between the fifth semiconductor regions. The eighth semiconductor region is electrically connected to the first semiconductor regions. The third electrode is provided on the tenth semiconductor region with a first insulating layer interposed. The third electrode is electrically connected to the gate electrodes.