Semiconductor Package With 3D Wires For Terminal Density
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Solution Overview
Problem
Current semiconductor packages face challenges in increasing the number of terminals exposed on the upper surface of the mold resin, making it difficult to mount multiple electronic components effectively.
Innovation Solution
The semiconductor package incorporates a lead frame, a semiconductor chip, and a plurality of three-dimensional wirings with exposed terminals on the upper surface of the mold resin, allowing for the mounting of two or more electronic components without suspension leads, thereby increasing the flexibility and number of terminals available.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional semiconductor package structure is used, then manufacturing process is simple, but number of terminals exposed on upper surface is limited
Solution Approach 1:
The patent introduces three-dimensional wirings that extend vertically from the lead frame through the mold resin, adding a vertical dimension (Z-axis) to the terminal arrangement. This allows terminals to be exposed on the upper surface of the mold resin without requiring additional horizontal space, thereby increasing the number of terminals while maintaining a compact footprint.
Solution Approach 2:
The three-dimensional wirings are embedded within the mold resin, with the wirings nested inside the resin body and only the terminal portions exposed on the upper surface. This nesting approach allows the terminal structure to be integrated within the package volume rather than extending externally, increasing terminal count without proportionally increasing package size.
2Adaptability or versatility
If number of terminals is increased, then flexibility of component arrangement is improved, but space required for passive components increases
Solution Approach 1:
By extending terminals vertically through the mold resin rather than arranging them only on the horizontal plane, the patent enables multiple terminals to be positioned within the same footprint area. This vertical arrangement provides flexibility for mounting multiple electronic components on the upper surface without increasing the horizontal space required.
3Quantity of substance
If three-dimensional wirings are added, then number of exposed terminals increases, but manufacturing complexity increases
Solution Approach 1:
The three-dimensional wirings are prepared and positioned on the lead frame before the mold resin is applied. This preliminary arrangement allows the wirings to be integrated into the package structure in a single molding process, avoiding the need for subsequent complex assembly steps to install additional terminal structures.
Solution Approach 2:
The patent combines the three-dimensional wirings with the mold resin in a single integrated structure, where the wirings are embedded within the resin body. This merging of the wiring structure with the encapsulation material simplifies manufacturing by eliminating separate assembly steps for installing terminal structures after molding.
Data Source
AI summary
A semiconductor package includes a lead frame, a semiconductor chip, a plurality of three-dimensional wrings, and a mold resin. The semiconductor chip is mounted on the lead frame. The mold resin covers a part of the lead frame, the semiconductor chip, and a part of each of the plurality of three-dimensional wirings.