Semiconductor Package Without Leadframe Using Adhesive Tape Clips
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor device packaging methods often require leadframes and wire bonds, which increase costs, build time, and package size, while also introducing long electrical paths that can affect performance.
Innovation Solution
A method involving an adhesive tape to mechanically and electrically couple clips with semiconductor dies, overmolding or encapsulating the dies and clips with a mold compound, leaving electrical contacts exposed for direct connection to conductive paths on a motherboard, eliminating the need for leadframes and wire bonds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If leadframes and wire bonds are used in semiconductor packaging, then mechanical support and electrical connection are provided, but package size, cost, and build time increase
Solution Approach 1:
The patent extracts and eliminates the leadframe and wire bond components from the packaging system. Instead of using traditional leadframes to support the die and wire bonds to connect electrical contacts, the invention directly bonds the die to the substrate and uses printed conductive paths on the substrate for electrical connections, thereby removing unnecessary components to reduce package size
Solution Approach 2:
The substrate serves multiple functions simultaneously: it provides mechanical support for the die, acts as the mounting platform, and contains printed conductive paths that replace both the leadframe's electrical connection function and the wire bonds. This multi-functionality eliminates the need for separate leadframe and wire bond components
2Reliability
If leadframes and wire bonds are used in semiconductor packaging, then electrical connections are established, but build time and cost increase
Solution Approach 1:
The patent merges the electrical connection function into the substrate itself through printed conductive paths. Instead of separately installing leadframes and wire bonds in multiple steps, the substrate is pre-configured with conductive traces that directly connect to the die bonds, reducing the packaging process to fewer steps and reducing build time
Solution Approach 2:
The conductive paths are pre-printed on the substrate before the die is mounted. This preliminary preparation of the electrical connection infrastructure eliminates the need for time-consuming wire bonding or leadframe assembly steps during the packaging process, thereby reducing overall build time
3Reliability
If leadframes and wire bonds are used in semiconductor packaging, then electrical connections are provided, but long electrical paths affect performance
Solution Approach 1:
The patent removes the leadframe and wire bond structures that create long electrical paths. By using direct die-to-substrate bonding with printed conductive paths, the electrical connection length is minimized to only what is necessary for the functional signal paths, eliminating the excessive length introduced by traditional packaging components
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces package size, cost, and build time, improves electrical performance by eliminating long paths, and allows for tightly controlled connections, enabling efficient distribution of electrical signals through a distribution layer on the motherboard.
Implementation Method 1
contacting at least one electrical contact of at least one die with an adhesive surface of the adhesive tape; mechanically and electrically coupling at least one clip with the at least one die and contacting an electrical contact of the at least one clip with the adhesive surface
Data Source
AI summary
Implementations of a semiconductor device package may include: a plurality of electrical contacts on a first face of a die, at least one clip electrically and mechanically coupled with at least one electrical contact on a second face of the die where the second face of the die is on an opposing side of the die from the first face of the die. The at least one clip may include at least one lead in electrical communication with the at least one electrical contact on the second face of the die. A mold compound or an encapsulating compound may be included around the die and a majority of the at least one clip where a portion of the at least one lead and a portion of the plurality of electrical contacts on the first face of the die are not overmolded or encapsulated. The semiconductor package includes no lead frame.