Semiconductor Package Air-Gap Bonding to Prevent Delamination

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Solution Overview

Problem

Existing semiconductor packages face challenges in integrating multiple semiconductor chips with high reliability and without using adhesive films or connecting bumps, leading to issues like interfacial delamination and void formation during thermal compression.

Innovation Solution

A semiconductor package design featuring air gaps surrounding bonding pad structures, formed by recesses in insulating layers of adjacent chips, which trap gas and prevent delamination, ensuring reliable electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If direct bonding technology is used to join semiconductor chips without adhesive films or connecting bumps, then integration density and reliability are improved, but interfacial delamination and void formation occur during thermal compression

Engineering Contradiction:

Improvechip connection reliabilityVSAvoidinterfacial delamination and void formation

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The bonding interface is segmented into multiple regions: bonding pad structures for electrical connection, air gaps for stress relief, and bonding surfaces for mechanical bonding. This segmentation allows each region to perform its specific function optimally, preventing delamination while maintaining reliable electrical connections.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Air gaps act as intermediary structures between the bonding pad structures and the bonding surfaces. These air gaps trap gas during thermal compression, preventing the harmful effects of direct pressure on the bonding interface while still allowing the bonding surfaces to form strong bonds.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If multiple semiconductor chips are integrated into a package structure, then component integration capacity increases, but manufacturing complexity and precision requirements increase

Engineering Contradiction:

Improvecomponent integration capacityVSAvoidbonding interface precision

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The recesses are formed in the insulating layers before the bonding process. This preliminary action creates pre-defined air gaps that guide the thermal compression process, making it easier to achieve precise bonding interfaces without requiring extremely high manufacturing precision during the actual bonding step.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The insulating layers have different depths at different locations, creating varying air gap sizes. This parameter change allows optimization of the bonding process: larger air gaps provide more stress relief, while smaller air gaps maintain better electrical insulation, enabling high integration capacity with controlled precision requirements.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design enhances the joining quality and reliability of semiconductor packages by preventing interfacial delamination and void formation, improving the integrity of chip connections.

Implementation Method 1

a first air gap that surrounds the first bonding pad structure, and a second air gap that surrounds the second bonding pad structure

Methodology Applied

Scientific EffectGas trapping:

Implementation Method 2

first bonding surfaces that are defined by at least a portion of the first insulating layer and at least a portion of the second insulating layer that are in contact with each other

Methodology Applied

Scientific EffectThermal compression bonding:

Data Source

PatentUS12451449B2Semiconductor package, and method of manufacturing the same

Publication Date: 2025.10.21 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor package is provided in which a first insulating layer includes a first recess spaced apart from a first pad in a first direction, and a second insulating layer includes a second recess spaced apart from a second pad in the first direction and overlapping at least a portion of the first recess in a second direction, perpendicular to the first direction, to provide an air gap together with the first recess. The semiconductor package further includes a first bonding surface defined by the first and second insulating layers contacting each other on one side of the air gap, adjacent to the first and second pads, and a second bonding surface defined by the first and second insulating layers contacting each other on another side of the air gap, opposite to the one side.