Semiconductor Package Layout Using Auxiliary Circuit Layers

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Solution Overview

Problem

The increasing demand for higher density and functionality in semiconductor chips leads to higher heat generation and increased I/O pins, necessitating more circuit layers in the package substrate, which results in low yield and high cost.

Innovation Solution

A semiconductor package design that incorporates a package substrate with main and auxiliary circuit layers, where auxiliary circuit layers replace some main layers, reducing the overall number of main circuit layers required, and includes a heat sink for heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of circuit layers in the package substrate is increased to meet higher I/O pin demands, then the functionality and processing speed of the semiconductor chip are improved, but the yield of the package substrate decreases and the manufacturing cost increases substantially

Engineering Contradiction:
Improvefunctionality and processing speedVSAvoidyield of package substrate
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The invention divides the circuit layers into two separate parts: main circuit layers on the package substrate and auxiliary circuit layers on the circuit structure. This segmentation allows the auxiliary circuit layers to handle additional I/O pin requirements without increasing the complexity and reducing the yield of the main package substrate, thus resolving the contradiction between functionality and productivity.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If the number of circuit layers in the package substrate is increased to accommodate more I/O pins, then the electronic component functionality is enhanced, but the overall manufacturing cost increases substantially

Engineering Contradiction:
Improvenumber of I/O pinsVSAvoidmanufacturing cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The circuit functionality is segmented between the package substrate and the separate circuit structure. The auxiliary circuit layers on the circuit structure provide additional I/O pins without requiring increased complexity in the package substrate, thereby avoiding the substantial cost increase associated with manufacturing high-layer-count substrates.

Inventive Principle:
Principle #1Segmentation

3Quantity of substance

If more main circuit layers are used in the package substrate, then the I/O pin capacity increases, but the package thickness and volume increase

Engineering Contradiction:
ImproveI/O pin capacityVSAvoidpackage volume
Core Design Contradiction:
Quantity of substanceVSVolume of moving object

Solution Approach 1:

The invention moves part of the circuit layers from the vertical stacking dimension (main circuit layers on package substrate) to a separate horizontal dimension (auxiliary circuit layers on the circuit structure). This dimensional change allows increased I/O pin capacity without proportionally increasing package thickness and volume.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design improves yield and reduces cost by minimizing the number of main circuit layers, allows for thinner and smaller packages, and enhances structural strength, while maintaining functionality and heat dissipation.

Implementation Method 1

heat generated by the semiconductor chip can be dissipated by the heat-dissipating paste and the heat sink

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS12412819B2Electronic package and manufacturing method thereof
Publication Date: 2025.09.09 SILICONWARE PRECISION IND CO LTD
  • US12412819B2 patent drawing
  • US12412819B2 patent drawing
  • US12412819B2 patent drawing

AI summary

Provided is an electronic package providing a circuit structure having auxiliary circuit layers. Further, an electronic component is disposed on the circuit structure and electrically connected to the auxiliary circuit layers. In addition, an encapsulant covers the electronic component, and the circuit structure is disposed on the package substrate having a plurality of main circuit layers, such that the main circuit layers are electrically connected to the auxiliary circuit layers. As such, a number of layers of the auxiliary circuit layers is used to replace a layer number configuration of the main circuit layers.