Semiconductor Package Barrier Layout for Reference Mark Protection
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Solution Overview
Problem
The existing methods for forming an electromagnetic wave shielding layer on semiconductor packages often result in alignment mark recognition defects due to the lifting of protective tapes at the edge portions, causing the shielding material to penetrate and cover alignment marks on the lower surface.
Innovation Solution
A semiconductor package design that includes a package substrate with substrate pads in the middle region and a reference mark at a corner portion within the edge region on the lower surface, along with a barrier protruding downwards between the corner and the reference mark, which prevents the electromagnetic shielding material from covering the reference mark.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If an electromagnetic wave shielding layer is formed on the semiconductor package, then electromagnetic wave shielding performance is improved, but alignment mark recognition defects occur due to material penetration
Solution Approach 1:
A protective tape is introduced as an intermediary layer between the electromagnetic wave shielding layer and the semiconductor package lower surface. This tape prevents the shielding material from penetrating and covering the alignment mark, while still allowing the shielding function to be effective. The tape acts as a barrier that mediates between the shielding requirement and the alignment mark visibility requirement.
Solution Approach 2:
The lower surface of the semiconductor package is divided into different functional zones: a first area containing the alignment mark that requires visibility, and a second area that can accommodate shielding material. This segmentation allows the shielding layer to be formed in the second area while preserving alignment mark recognition in the first area.
2Manufacturing precision
If a protective tape is attached to prevent material penetration, then alignment mark recognition is improved, but the protective tape may lift at edge portions causing defects
Solution Approach 1:
The protective tape is extended not only across the planar surface but also in the vertical dimension by forming it to wrap around or cover the edge portions of the semiconductor package. This three-dimensional configuration prevents lifting at edges by anchoring the tape in multiple dimensions, thereby maintaining both alignment mark recognition and tape adhesion reliability.
3Object-affected harmful factors
If the electromagnetic shielding material is applied extensively, then shielding coverage is improved, but the material covers the reference mark causing recognition defects
Solution Approach 1:
The lower surface is segmented into a first area with the reference mark that must remain visible, and a second area where shielding material can be applied. This spatial segmentation ensures that the shielding material covers the necessary areas for electromagnetic protection while leaving the reference mark area exposed for proper recognition during manufacturing processes.
Solution Approach 2:
The protective tape serves as an intermediary that selectively protects the reference mark area from shielding material deposition. By positioning the tape to cover the reference mark region during the shielding material application process, the tape mediates between the need for extensive shielding coverage and the need to preserve reference mark visibility.
Data Source
AI summary
A semiconductor package includes a package substrate having substrate pads disposed in a middle region and a reference mark disposed at a first corner portion adjacent to a first corner within an edge region surrounding the middle region on a lower surface of the package substrate; at least one semiconductor chip mounted on an upper surface of the package substrate; a sealing member covering the at least one semiconductor chip on the package substrate; an electromagnetic shielding member covering a side surface of the package substrate and an upper surface and a side surface of the sealing member; and at least one barrier protruding downwards from the lower surface of the package substrate and is disposed between the first corner and the reference mark.