Semiconductor Package Base Structure for Cavity Prevention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor packages, the formation of cavities under the peripheral portions of stacked chips due to the overhang of larger chips can lead to unstable connections and mold voids during the wire bonding and molding processes, especially when the overhang length is significant, making it difficult to form a stable base with a prescribed shape using thermosetting resin films that expand concentrically.
Innovation Solution
The introduction of projection-like bases on the wiring board under the peripheral portions of the second semiconductor chip, covered by a thermosetting resin film, allows the resin to fill and expand beyond the chip edges, preventing cavity formation and ensuring stable connections and molding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a larger second semiconductor chip is mounted on the first semiconductor chip with significant overhang, then the chip size flexibility is improved, but cavities form under the peripheral portions during manufacturing
Solution Approach 1:
The patent applies preliminary action by forming projection-like bases on the wiring board before mounting the second semiconductor chip. These bases protrude toward the first semiconductor chip and are positioned to prevent cavity formation under the overhanging peripheral portions. By preparing this supportive structure in advance, the patent eliminates the harmful effect of cavities while maintaining chip size flexibility.
2Area of stationary object
If thermosetting resin film is used to fill the space between chips, then the resin expands concentrically to provide coverage, but it is difficult to form a stable base with prescribed shape
Solution Approach 1:
The patent applies local quality by creating projection-like bases with specific geometric shapes (such as L-shaped, T-shaped, or rectangular projections) at specific locations on the wiring board. These bases have predetermined shapes and dimensions that are optimized for their local function of preventing cavity formation. The projection structures provide localized support exactly where needed under the overhanging chip portions, rather than relying on uniform concentric expansion of resin.
Solution Approach 2:
The bases are formed on the wiring board before the thermosetting resin film is applied and before the second semiconductor chip is mounted. This preliminary formation of precisely-shaped bases allows the resin to be contained and guided into specific regions, ensuring both adequate coverage and precise shape control without relying solely on the resin's natural concentric expansion.
3Adaptability or versatility
If the overhang length of the second semiconductor chip is increased, then the design flexibility is improved, but the probability of mold void formation increases
Solution Approach 1:
The patent applies preliminary anti-action by introducing projection-like bases that actively counteract the tendency for cavity and mold void formation. These bases are positioned to extend into the region where the second semiconductor chip overhangs, providing preemptive support that prevents the formation of voids during the molding process. The bases act as barriers that eliminate the harmful effect before it can occur.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution prevents cavity formation and ensures stable wire bonding connections and reduced mold voids by allowing the thermosetting resin to cover and fill the areas under the larger chip, maintaining a flat surface and fillet shape, thus enhancing the reliability and stability of the semiconductor package.
Implementation Method 1
The thermosetting resin film 203 has a property that at this time it expands in a concentric manner (circularly) about the center of the film 203
Implementation Method 2
when the first semiconductor chip 210 is connected to the wiring board 230 by thermo-compression bonding, the thermosetting resin film 203 flows out from the outer periphery of the space between the first semiconductor chip 210 and the wiring board 230
Data Source
AI summary
There is provided a semiconductor package that includes: a wiring board; a first semiconductor chip mounted on the wiring board; a second semiconductor chip mounted on the first semiconductor chip, wherein a size of second semiconductor chip is larger than that of the first semiconductor chip when viewed from a thickness direction of the semiconductor package; an insulating resin provided between the wiring board and the second semiconductor chip and between the wiring board and the first semiconductor chip so as to cover the first semiconductor chip; a base disposed on the wiring board to face a surface of the second semiconductor chip, wherein the insulating resin is provided between the base and the second semiconductor chip so as to cover the base.