Semiconductor Package Layout With Bridge Die for Shorter Interconnects

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Solution Overview

Problem

Conventional 3.5D semiconductor packaging technologies face challenges with lengthy electrical paths and reduced connection members, leading to increased package thickness and size, which hinder high-performance integration density.

Innovation Solution

The semiconductor package design includes a redistribution layer structure connecting high-bandwidth memory and chiplet stack structures directly, with a bridge die and surface mount device (SMD) placed on the upper surface, eliminating the need for a silicon interposer and reducing electrical path lengths, and allowing for finer pitch connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the vertical thickness of the 3.5D package is thickened to accommodate bridge die and substrate, then integration density is improved, but electrical path length increases

Engineering Contradiction:
Improveintegration densityVSAvoidelectrical path length
Core Design Contradiction:
Quantity of substanceVSLength of moving object

Solution Approach 1:

The patent transitions from a conventional vertical stacking arrangement to a planar layout where HBM and chiplet stack structures are disposed side by side on the same substrate level. This dimensional reorganization eliminates the need for thick vertical interconnections through bridge die and substrate, significantly reducing electrical path length while maintaining high integration density through horizontal arrangement.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If SMD is disposed under the substrate, then connection members are reduced, but horizontal package size increases

Engineering Contradiction:
Improvenumber of connection membersVSAvoidhorizontal package size
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent merges the SMD disposal location with the existing substrate area by placing SMDs on the back surface of the substrate. This consolidation utilizes otherwise wasted space, reducing the number of connection members needed while maintaining compact horizontal package dimensions. The substrate serves dual purposes as both the mounting platform for upper components and the carrier for SMDs on its reverse side.

Inventive Principle:
Principle #5Merging (Combining)

3Stability of the object's composition

If bridge die and substrate are used to connect HBM and chiplet stack, then structural stability is improved, but electrical path length increases

Engineering Contradiction:
Improvestructural stabilityVSAvoidelectrical path length
Core Design Contradiction:
Stability of the object's compositionVSLength of moving object

Solution Approach 1:

The patent extracts and eliminates the bridge die from the connection architecture, directly connecting HBM and chiplet stack structures through the substrate. This removal of the intermediate bridge die component shortens the electrical path while the substrate alone provides sufficient structural stability to support the stacked configuration. The substrate is designed with enhanced mechanical properties to compensate for the removed bridge die structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20250022844A1Semiconductor package and method for manufacturing the same
Publication Date: 2025.01.16 SAMSUNG ELECTRONICS CO LTD
  • US20250022844A1 patent drawing
  • US20250022844A1 patent drawing
  • US20250022844A1 patent drawing

AI summary

A semiconductor package according to an embodiment may include, a redistribution layer structure; a first semiconductor stack structure on an upper surface of the redistribution layer structure, wherein the first semiconductor stack structure includes a first chiplet and a second chiplet disposed on the first chiplet; a second semiconductor stack structure on an upper surface of the redistribution layer structure side by side with the first semiconductor stack structure; a bridge die forming an electrical connection between the first semiconductor stack structure and the second semiconductor stack structure, the bridge die being disposed above the first semiconductor stack structure and the second semiconductor stack structure; and a surface mount device (SMD) disposed on an upper surface of at least one of the first semiconductor stack structure and the second semiconductor stack structure.