Semiconductor Package Bridge Structure for Warpage Control

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Solution Overview

Problem

Existing semiconductor packages using silicon interposers face challenges such as warpage, poor yield, high manufacturing costs, and difficulties in implementing fine patterns due to mismatched coefficients of thermal expansion and complex manufacturing processes.

Innovation Solution

A semiconductor package design that incorporates an interconnection bridge embedded within a connection structure, which replaces the conventional interposer, allowing for direct connection of semiconductor chips and controlling warpage while maintaining low costs and high yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a silicon interposer is used to connect semiconductor chips, then electrical connection between chips is achieved, but warpage occurs due to mismatched coefficients of thermal expansion

Engineering Contradiction:
Improveelectrical connectionVSAvoidwarpage
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The patent extracts the interconnection bridge from the traditional silicon interposer structure, allowing it to be surface-mounted separately on the connection structure. This separation enables independent optimization of the bridge's position and configuration, reducing warpage caused by thermal expansion mismatch while maintaining electrical connection functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a connection structure (substrate) as an intermediary between the semiconductor chips and the interconnection bridge. This mediator provides a stable mounting platform that decouples the thermal expansion issues from the electrical connection path, allowing chips to be connected without direct thermal interaction through the interposer.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a conventional interposer is used, then chip interconnection is achieved, but manufacturing cost increases

Engineering Contradiction:
Improvechip interconnectionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent employs an interconnection bridge that can be surface-mounted using standard SMT processes, replacing expensive silicon interposers. The bridge structure is designed to be cost-effective while maintaining functionality, and the connection structure serves as a disposable substrate that simplifies the overall manufacturing process.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent replaces the complex mechanical silicon interposer fabrication process with a simpler surface-mount technology approach. Instead of requiring precise silicon wafer processing and thin-film deposition, the interconnection bridge is mounted using standard SMT equipment, significantly reducing manufacturing complexity and cost.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If a silicon interposer is used, then chip connection is achieved, but yield decreases due to process issues

Engineering Contradiction:
Improvechip connectionVSAvoidyield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs preliminary actions by pre-mounting the interconnection bridge on the connection structure before attaching the semiconductor chips. This sequence allows the bridge to be positioned and secured in advance, reducing the risk of misalignment or damage during subsequent chip mounting processes, thereby improving overall yield.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The connection structure is designed to provide self-alignment and self-securing features for the interconnection bridge during surface mounting. The bridge's own structure enables it to be automatically positioned and fixed on the substrate, reducing the need for complex external alignment equipment and improving manufacturing yield.

Inventive Principle:
Principle #25Self-service

4Reliability

If a conventional interposer is used, then interconnection is achieved, but fine pattern implementation becomes difficult

Engineering Contradiction:
ImproveinterconnectionVSAvoidfine pattern implementation
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent transitions from planar fine-pattern fabrication on silicon interposers to three-dimensional surface mounting of interconnection bridges. By moving the interconnection function to a separate dimension (surface-mounted components rather than integrated circuits), the patent achieves fine patterning through precise SMT placement rather than complex photolithography, improving manufacturability of fine patterns.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12308336B2Semiconductor package
Publication Date: 2025.05.20 SAMSUNG ELECTRONICS CO LTD
  • US12308336B2 patent drawing
  • US12308336B2 patent drawing
  • US12308336B2 patent drawing

AI summary

A semiconductor package includes a first connection structure having first and second surfaces and including a first redistribution layer, a first semiconductor chip disposed on the first surface and having a first connection pad electrically connected to the first redistribution layer, a second semiconductor chip disposed around the first semiconductor chip on the first surface and having a second connection pad electrically connected to the first redistribution layer, an interconnection bridge disposed on the second surface to be spaced apart from the second surface and connected to the first redistribution layer through a connection member to electrically connect the first and second connection pads to each other, and a second connection structure disposed on the second surface to embed the interconnection bridge and including a second redistribution layer electrically connected to the first redistribution layer.