Semiconductor Package Backside Metallization Deburring

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Solution Overview

Problem

Conventional singulation processes of wafers with backside metallization (BSM) result in metal debris on semiconductor packages, leading to package failures due to electrical shorts, which compromises package reliability.

Innovation Solution

A semiconductor package with deburred sidewall profiles is developed, where backside metallization is deposited over the substrate, and a deburring process is employed to remove metal debris, creating slanted or beveled surfaces on the sidewalls to prevent debris accumulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional singulation processes are used on wafers with backside metallization, then packaging efficiency is maintained, but metal debris remains on packages causing electrical shorts and reliability issues

Engineering Contradiction:
Improvepackage reliabilityVSAvoidmetal debris
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A deburring process is performed after singulation to remove metal debris from the sidewalls of the semiconductor package. This preliminary cleaning action eliminates harmful metal particles before they can cause electrical shorts or reliability issues in the final packaged device.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The singulation process that initially creates metal debris as a harmful byproduct is followed by a deburring step that converts this harmful situation into a benefit by removing the debris. The controlled removal process transforms the problematic metal particles into removable burrs that can be cleanly eliminated, leaving the package surface clean and reliable.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Reliability

If wafer is thinned to improve circuit performance, then electrical performance is improved, but mechanical strength of the wafer decreases

Engineering Contradiction:
Improvecircuit performanceVSAvoidmechanical strength of wafer
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

Backside metallization layers are deposited on the thinned wafer to create a composite structure. The metal layers provide both electrical functionality for improved circuit performance and mechanical reinforcement to compensate for the reduced wafer thickness, creating a multi-functional composite that addresses both electrical and mechanical requirements.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The wafer thickness parameter is reduced to improve electrical performance, while the metallization layer parameters (thickness, material composition) are adjusted to provide compensating mechanical strength. This parameter optimization allows the wafer to achieve both thinness for electrical performance and sufficient strength through the metallization reinforcement.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The deburred sidewall profiles effectively eliminate metal debris, enhancing package reliability by preventing electrical shorts and improving mechanical and thermal performance.

Implementation Method 1

Backside metallization (BSM) is deposited over the second surface of the substrate

Methodology Applied
Scientific EffectPhysical vapor deposition: Physical Vapour Deposition

Implementation Method 2

A deburred surface is formed on a sidewall profile of the semiconductor package to remove metal debris

Methodology Applied
Scientific EffectMechanical abrasion: Abrasion

Data Source

PatentUS11710661B2Semiconductor packages and methods of packaging semiconductor devices
Publication Date: 2023.07.25 UTAC HEADQUARTERS PTE LTD
  • US11710661B2 patent drawing
  • US11710661B2 patent drawing
  • US11710661B2 patent drawing

AI summary

A semiconductor package is disclosed. The semiconductor package includes a substrate with a first surface, a second surface and sidewalls. The package also includes backside metallization (BSM) over the second surface of the substrate. The semiconductor package is devoid of metal debris.