Semiconductor Package Bump Structure for Void-Free Dense Mounting

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Solution Overview

Problem

During the process of mounting semiconductor elements on a package substrate, insufficient spacing distances can lead to voids in the molding member and the presence of foreign substances, potentially causing short failures.

Innovation Solution

A semiconductor package design that includes a package substrate with exposed substrate pads, conductive bumps with a bump body and a conductive member having different melting points, and a semiconductor element with metal oxide barriers, which ensures adequate spacing and prevents foreign substances from interfering.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If spacing distances between semiconductor elements and package substrate are reduced to improve mounting density, then productivity is improved, but voids and foreign substances occur in the molding member leading to short failures

Engineering Contradiction:
Improvemounting densityVSAvoidshort failure rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A spacer element is introduced as an intermediary component between the semiconductor element and the package substrate. This spacer maintains an optimal spacing distance that prevents voids and foreign substances from entering the molding member during the molding process, while still allowing for adequate mounting density. The spacer acts as a physical barrier and spacing control mechanism that resolves the conflict between reduced spacing for higher density and sufficient spacing for reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If spacing distances are increased to prevent voids and foreign substances, then reliability is improved, but mounting density and productivity deteriorate

Engineering Contradiction:
Improveshort failure rateVSAvoidmounting density
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The spacer element provides localized spacing control at specific critical locations between semiconductor elements and the package substrate. Rather than uniformly increasing spacing across the entire package, the spacer is strategically positioned only where void formation and foreign substance contamination are most likely to occur during molding. This localized approach maintains reliability by preventing defects at critical spots while preserving mounting density in other areas.

Inventive Principle:
Principle #3Local quality

3Device complexity

If conventional mounting process is used without spacers, then device complexity is reduced, but voids and foreign substances occur leading to short failures

Engineering Contradiction:
Improvemounting process complexityVSAvoidshort failure rate
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The spacer element is designed to be self-aligning and self-positioning during the mounting process. It automatically maintains the correct spacing distance between the semiconductor element and the package substrate without requiring complex external positioning mechanisms or sophisticated process control. The spacer's geometry and material properties enable it to self-adjust and maintain optimal spacing, thereby preventing voids and foreign substance contamination while adding minimal complexity to the overall mounting process.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively prevents voids and foreign substances from forming between the semiconductor element and the package substrate, thereby reducing the risk of short failures and ensuring reliable electrical connections.

Implementation Method 1

the bump body has a first melting point, and the conductive member at least partially surrounds the bump body and has a second melting point that is lower than the first melting point

Methodology Applied
Scientific EffectMelting: Melting

Data Source

PatentUS20250038095A1Semiconductor package and method of manufacturing the semiconductor package
Publication Date: 2025.01.30 SAMSUNG ELECTRONICS CO LTD
  • US20250038095A1 patent drawing
  • US20250038095A1 patent drawing
  • US20250038095A1 patent drawing

AI summary

A semiconductor package includes: a package substrate having a first surface and a second surface, wherein the package substrate includes a plurality of first substrate pads and a plurality of second substrate pads that are electrically connected to each other; a semiconductor device mounted on the package substrate and electrically connected to the plurality of first substrate pads; conductive bumps disposed on the plurality of second substrate pads, wherein each of the conductive bumps includes a bump body and a conductive member, wherein the bump body has a first melting point, and the conductive member at least partially surrounds the bump body and has a second melting point that is lower than the first melting point; and a semiconductor element mounted on the package substrate, wherein the semiconductor element has metal oxide barriers that are provided on the conductive members and a side surface of the semiconductor element.