Semiconductor Package Connection Bumps With Segmented Pillar Structures

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Solution Overview

Problem

Current semiconductor packages face challenges in achieving a balance between being small and light while maintaining high performance and large storage capacity, particularly due to limitations in through-substrate via (TSV) structures and connection bumps that affect mechanical strength and reliability under high-temperature processes.

Innovation Solution

A semiconductor package design that incorporates a first semiconductor chip with a through-electrode and a second chip connected via connection bumps with different pillar structures and solder layers, where the first pillar structure has a lower Young's modulus and the second pillar structure has better high-temperature properties, ensuring stable adhesion and preventing void formation during stacking and mounting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If connection bumps with uniform material composition are used, then manufacturing process is simple, but mechanical strength and adhesion stability under high-temperature processes are insufficient

Engineering Contradiction:
Improvemechanical strengthVSAvoidconnection bump structure
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The connection bump is divided into multiple layers with different materials: a first connection bump material layer (e.g., Cu or Cu alloy) providing mechanical strength and adhesion, and a second connection bump material layer (e.g., Ni or Ni alloy) providing oxidation resistance and high-temperature stability. This segmentation allows each layer to perform its specific function optimally.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The connection bump uses a composite structure combining different metal materials. The first connection bump material (Cu-based) offers excellent adhesion to semiconductor substrates and high ductility, while the second connection bump material (Ni-based) provides oxidation resistance and dimensional stability under high-temperature processes, creating a composite material system that overcomes the limitations of single-material bumps.

Inventive Principle:
Principle #40Composite materials

2Reliability

If single-material connection bumps are used, then manufacturing is easier, but adhesion stability and void prevention during stacking are insufficient

Engineering Contradiction:
Improveadhesion stabilityVSAvoidconnection bump fabrication
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The connection bump structure is segmented into functional layers: the first connection bump material layer (Cu or Cu alloy) bonded to the semiconductor substrate provides strong adhesion, while the second connection bump material layer (Ni or Ni alloy) bonded to the interlayer insulating film provides oxidation resistance and dimensional stability during high-temperature stacking processes, preventing void formation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the material composition parameter of the connection bump from a single material to a multi-layer composite structure. By selecting materials with appropriate properties (Cu for adhesion, Ni for oxidation resistance) and controlling their thickness ratios, the structure achieves stable adhesion and prevents void formation during high-temperature stacking while remaining manufacturable through established sputtering or electroplating processes.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If through-substrate via structures are used to increase storage capacity, then semiconductor package performance improves, but warpage and intermetallic compound formation increase

Engineering Contradiction:
Improvepackage performanceVSAvoidwarpage and intermetallic compound formation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The connection bump uses a composite material structure where the first connection bump material layer (Cu or Cu alloy) provides excellent adhesion to the semiconductor substrate and high ductility to accommodate thermal expansion differences, while the second connection bump material layer (Ni or Ni alloy) provides oxidation resistance and dimensional stability, reducing warpage and preventing excessive intermetallic compound formation during high-temperature processes.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

By changing the material composition and thermal expansion parameters of the connection bump structure, the invention reduces thermal stress during temperature cycling. The Cu-based first layer accommodates substrate expansion while the Ni-based second layer maintains dimensional stability, thereby reducing warpage and controlling intermetallic compound formation in TSV structures with increased storage capacity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves a compact, high-performance semiconductor package with improved mechanical strength and reliability by using connection bumps with distinct materials, addressing issues of warpage and intermetallic compound formation, thereby enhancing adhesion and reducing the risk of cracks and voids.

Implementation Method 1

the first pillar structure has a lower Young's modulus

Methodology Applied
Scientific EffectYoung's modulus:

Implementation Method 2

the second pillar structure has better high-temperature properties

Methodology Applied
Scientific EffectHigh-temperature material properties:

Implementation Method 3

addressing issues of warpage and intermetallic compound formation

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS11610865B2Semiconductor package
Publication Date: 2023.03.21 SAMSUNG ELECTRONICS CO LTD
  • US11610865B2 patent drawing
  • US11610865B2 patent drawing
  • US11610865B2 patent drawing

AI summary

A semiconductor package includes a first semiconductor chip in which a through-electrode is provided, a second semiconductor chip connected to a top surface of the first semiconductor chip, a first connection bump attached to a bottom surface of the first semiconductor chip and including a first pillar structure and a first solder layer, and a second connection bump located between the first semiconductor chip and the second semiconductor chip, configured to electrically connect the first semiconductor chip and the second semiconductor chip, and including a second pillar structure and a second solder layer.