Semiconductor Package Encapsulation for Void-Free Capacitor Gaps

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Solution Overview

Problem

Existing semiconductor packages face issues with voids and gaps around surface mount devices, particularly capacitors, leading to delamination, solder bridging, and popcorn problems due to poor encapsulant adherence and expansion of trapped gases, which undermine reliability and operational lifespan.

Innovation Solution

Employing a fine filler encapsulant with a particle size of less than or equal to 5 micrometers to fully encase surface mount devices, ensuring complete filling of spaces and improved adherence, thereby reducing or eliminating voids and gaps, and acting as an intermediary layer between the capacitor and a larger encapsulant.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional encapsulant with larger particle size is used, then the manufacturing process is simpler and faster, but voids and gaps form around surface mount devices leading to delamination and reliability issues

Engineering Contradiction:
Improvepackage reliabilityVSAvoidencapsulant application process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The encapsulant is segmented into two distinct types with different particle sizes: a fine filler encapsulant (≤5 micrometers) for filling voids and gaps around surface mount devices, and a conventional larger particle size encapsulant for the bulk encapsulation. This segmentation allows each encapsulant type to perform its specific function optimally without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the semiconductor package receive different encapsulant materials tailored to their specific needs. The fine filler encapsulant is applied locally to areas requiring void filling and adhesion enhancement (around surface mount devices), while the conventional encapsulant is used for general encapsulation where large particle size is acceptable.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If the encapsulant particle size is reduced to ≤5 micrometers, then voids and gaps are filled and adhesion is improved, but the manufacturing process becomes more complex and time-consuming

Engineering Contradiction:
Improvevoid filling precisionVSAvoidmanufacturing throughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The fine filler encapsulant is applied in advance as a preliminary step before the conventional encapsulant is applied. This preliminary action ensures that all voids and gaps are filled and surfaces are properly adhered to before the bulk encapsulation process, preventing defects from forming later.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses a composite approach by combining two different encapsulant materials with distinct particle size characteristics. The fine filler encapsulant provides precise void filling and adhesion, while the conventional larger particle encapsulant provides efficient bulk encapsulation, together creating a complete encapsulation system that balances precision and productivity.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The fine filler encapsulant effectively reduces delamination and solder bridging, enhances adhesion, and improves the overall reliability and durability of semiconductor packages by filling spaces and adhering to surfaces, thus maintaining structural integrity during reflow processes and operation.

Implementation Method 1

The relatively small particle size allows the fine filler encapsulant to fill small spaces between the surface mount devices and other components of the semiconductor packages

Methodology Applied
Scientific EffectCapillary action: Capillary Action

Implementation Method 2

The relatively small particle size allows the fine filler encapsulant to fill small spaces between the surface mount devices and other components of the semiconductor packages and/or better adhere to exterior surfaces of the surface mount devices

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS20250379066A1Systems and methods for reducing gaps around surface mount devices in stacked semiconductor devices
Publication Date: 2025.12.11 MICRON TECHNOLOGY INC
  • US20250379066A1 patent drawing
  • US20250379066A1 patent drawing
  • US20250379066A1 patent drawing

AI summary

Systems and methods for manufacturing semiconductor packages are disclosed herein. In some embodiments, the method includes integrating one or more capacitors and a stack of one or more semiconductor dies with an upper surface of a base substrate of the semiconductor package. The method also includes encasing each of the one or more capacitors with a first encapsulant, then depositing a second encapsulant over each of the one or more capacitors and the die stack. The first encapsulant can have a first individual particle size that is smaller than a second individual particle size of the second encapsulant. The relatively small particle size allows the first encapsulant to completely fill spaces between the capacitors and the base substrate and/or fully adhere to the surfaces of the capacitors. As a result, the first encapsulant can reduce voids in the completed semiconductor package that can cause deleterious effects.