Semiconductor Package Outer Capacitors Power Integrity
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Solution Overview
Problem
Current semiconductor packages face challenges in enhancing power integrity due to noise filtering limitations in power voltage and ground voltage transmission, which affects the performance of high-integration semiconductor devices.
Innovation Solution
The semiconductor package incorporates a configuration of outer capacitors and metal patterns on semiconductor chips, with insulated electrodes and conductive patterns connecting them to reduce inductance and enhance power integrity by filtering noise effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional power distribution networks are used in high-integration semiconductor packages, then device integration is achieved, but power integrity deteriorates due to noise and voltage fluctuations
Solution Approach 1:
The patent divides the power distribution network into multiple independent power rails (first power rail, second power rail, third power rail) with separate via connections to different power pins. This segmentation isolates noise sources and prevents coupling between power domains, thereby improving power integrity while supporting high device integration
Solution Approach 2:
The patent introduces ground vias as intermediary elements positioned between power rails and ground. These ground vias act as mediators that provide stable reference potential and sink noise, isolating the power rails from ground noise and improving overall power integrity in the high-integration package
2Reliability
If noise filtering components are added to improve power integrity, then voltage noise filtration is enhanced, but device complexity increases
Solution Approach 1:
The via structures serve multiple functions: they provide electrical connection, act as noise filtering elements through their inductance and capacitance to ground, and provide mechanical support. This multi-functionality improves power integrity without adding separate dedicated filtering components, thereby avoiding increased device complexity
Solution Approach 2:
The patent optimizes the electrical parameters of existing package elements by adjusting via dimensions, spacing, and material composition to achieve desired inductance and capacitance values for noise filtering. This approach improves power integrity by modifying parameters of existing structures rather than adding new components
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases power integrity by reducing inductance and noise filtering distances, leading to improved voltage noise dispersion and filtration, thereby enhancing the performance of semiconductor devices.
Implementation Method 1
a first outer capacitor on the semiconductor chip including a first electrode and a second electrode; a second outer capacitor on the semiconductor chip including a first electrode pattern and a second electrode pattern
Data Source
AI summary
Disclosed is a semiconductor package including a semiconductor chip, a first outer capacitor on the semiconductor chip including a first electrode and a second electrode, a second outer capacitor on the semiconductor chip including a first electrode pattern and a second electrode pattern, and a conductive pattern on the semiconductor chip and electrically connected to the first electrode of the first outer capacitor and the first electrode pattern of the second outer capacitor. The second electrode of the first outer capacitor is insulated from the second electrode pattern of the second outer capacitor.