Semiconductor Package Cavity Structure for Shorter Bonding Wires

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Solution Overview

Problem

Existing semiconductor package structures suffer from long signal propagation paths and high electrical resistance, leading to signal integrity issues, reduced operating speed, and increased manufacturing costs.

Innovation Solution

A semiconductor package structure with a package substrate featuring a dam structure and cavity for semiconductor die placement, reducing bonding wire length and encapsulating layer thickness, thereby minimizing signal propagation path and enhancing heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If conventional semiconductor package structures are used, then manufacturing is simpler, but signal propagation path is long and electrical resistance is high

Engineering Contradiction:
Improvesignal propagation path lengthVSAvoidpackage structure complexity
Core Design Contradiction:
Length of moving objectVSDevice complexity

Solution Approach 1:

The patent introduces a cavity structure in the package substrate that extends vertically from the top surface toward the bottom surface. The semiconductor die is mounted at the bottom of this cavity, allowing bonding wires to connect directly from the die pads to substrate pads through the cavity space. This vertical dimension utilization reduces the horizontal signal propagation path length while maintaining electrical connectivity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The semiconductor die is nested within the cavity formed in the package substrate. The cavity acts as a recessed space that accommodates the die, allowing the bonding wires to be shorter as they connect within the cavity volume rather than spanning across the entire substrate surface. This nesting arrangement reduces the bonding wire length and signal propagation path.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Speed

If bonding wire length is reduced to improve signal integrity, then operating speed improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improveoperating speedVSAvoiddie placement precision
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The cavity is pre-formed in the package substrate before the semiconductor die is mounted. This preliminary action creates a predetermined recessed space with specific dimensional tolerances, ensuring that when the die is placed in the cavity, the bonding wire length is automatically controlled within acceptable ranges. The cavity acts as a mechanical guide that facilitates precise die positioning.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cavity provides a localized region with optimized geometric properties for die mounting. The cavity's depth and width are specifically designed to match the die thickness and footprint, creating a tailored fitting space that ensures precise die placement and optimal bonding wire length without requiring high-precision placement equipment across the entire substrate.

Inventive Principle:
Principle #3Local quality

3Temperature

If package thickness is reduced to improve heat dissipation, then thermal performance improves, but structural stability may worsen

Engineering Contradiction:
Improveheat dissipation performanceVSAvoidpackage structural stability
Core Design Contradiction:
TemperatureVSStrength

Solution Approach 1:

The package substrate is segmented into multiple functional layers including the cavity structure, which divides the substrate thickness into distinct regions. The cavity creates a stepped configuration that reduces the overall package height while maintaining adequate structural support. The encapsulating material further segments the package by filling the cavity and surrounding the die, providing mechanical support and thermal pathways.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The cavity is strategically positioned and dimensioned to provide localized thickness reduction in the package substrate. The cavity depth is optimized to reduce package height and improve heat dissipation while the surrounding substrate material maintains structural integrity. The encapsulating material compensates for the cavity-induced structural reduction by providing additional mechanical support.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20260011678A1Semiconductor package structure
Publication Date: 2026.01.08 AIROHA TECHNOLOGY CORPORATION
  • US20260011678A1 patent drawing
  • US20260011678A1 patent drawing
  • US20260011678A1 patent drawing

AI summary

A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor die, a package substrate, and at least one bonding wire. The package substrate includes a dam structure to define a space where the semiconductor die is placed. The bonding wire is electrically connected between the semiconductor die and the package substrate.