Semiconductor Package Structure for Shorter CoC Signal Paths
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Solution Overview
Problem
Chip-on-chip (CoC) packages face signal integrity issues and limited high-speed data rate capabilities due to high resistance and long transmission paths of bond wires, and singulation processes can damage the active surface of photonic dies during electronic IC and photonic IC integration.
Innovation Solution
A semiconductor package structure with a first electronic device featuring an angled lateral surface and a method of manufacturing that includes forming a trench in a semiconductor substrate to separate electronic devices while minimizing damage to the active surface of photonic dies, allowing for face-to-face bonding and reduced warpage through a chip-on-wafer process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonding is used to connect stacked electronic components, then electrical communication is achieved, but signal integrity deteriorates due to high resistance and long transmission path
Solution Approach 1:
The patent transitions from vertical wire bonding (3D stacking with long transmission paths) to lateral direct bonding (2D planar connection with short transmission paths). Electronic devices are bonded face-to-face on the same substrate plane, reducing the transmission path from vertical through multiple layers to a direct lateral connection, thereby improving signal integrity while maintaining electrical communication.
Solution Approach 2:
The patent eliminates the wire bonding intermediate structure by directly bonding electronic device surfaces together. The bond wires and associated bonding processes are removed from the system, replacing them with direct surface-to-surface electrical connections that provide lower resistance and shorter transmission paths.
2Productivity
If singulation operations are performed on the package to separate electronic devices, then individual devices are obtained, but the active surface of the photonic die is damaged
Solution Approach 1:
The patent introduces score lines (first and second score lines) that define separation regions between electronic devices. These score lines create predetermined weak points in the substrate that guide the singulation process, allowing devices to be separated along defined paths that avoid the active surfaces of photonic dies. The segmentation is performed in a controlled manner that protects critical device regions.
Solution Approach 2:
The score lines act as intermediary structures that facilitate device separation without directly contacting or damaging the photonic die active surfaces. The score lines provide a controlled separation path that intermediates between the singulation tool and the sensitive device regions, enabling productivity while preserving manufacturing precision.
3Speed
If conventional wire bonding is used for high speed data transmission, then electrical connection is established, but high impedance prevents high speed data rate realization
Solution Approach 1:
The patent replaces the mechanical wire bonding system with a direct surface-mounted electrical connection system. Instead of using elevated wire bonds that create inductance and impedance, the connection is made through direct contact between bonded surfaces, reducing parasitic effects and enabling high-speed data transmission with better signal quality.
Data Source
AI summary
A semiconductor package structure and a method of manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a first electronic device and a second electronic device. The first electronic device has an active surface and a lateral surface angled with the active surface, and the lateral surface includes a first portion and a second portion that is non-coplanar with the first portion. The second electronic device is disposed on the active surface of the first electronic device.