Semiconductor Package Conductive Pillar Cap Design

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Solution Overview

Problem

Semiconductor packages face challenges with warpage due to insufficient lateral stress tolerance in the bonding between pillars and bump pads, leading to incomplete connections and cracks, which is exacerbated by thermal stress and limited design options that either reduce package size or increase manufacturing costs.

Innovation Solution

The semiconductor package design incorporates conductive pillars with a cap portion and a dielectric layer, where the cap portion is wider than the body portion, allowing for increased lateral stress tolerance and compact sizes, preventing warpage by reducing stress components and avoiding solder bridges between adjacent pillars.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional bonding configuration is used, then manufacturing process is simple, but lateral stress tolerance is insufficient causing warpage and bonding defects

Engineering Contradiction:
Improvelateral stress toleranceVSAvoidbonding configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductive pillar is segmented into two distinct portions: a body portion and a cap portion. The cap portion has a larger cross-sectional area than the body portion, creating a stepped structure. This segmentation allows the cap portion to specifically bear lateral stresses while the body portion maintains electrical connectivity, thereby improving lateral stress tolerance without requiring complete redesign of the entire bonding system

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The cap portion is designed with a larger cross-sectional area specifically at the bonding interface with the bump pad, while the body portion maintains a smaller cross-section for electrical connection. This local quality enhancement concentrates the stress-bearing capability exactly where needed (at the bonding interface) without increasing the overall pillar size or complexity elsewhere in the structure

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If package size is reduced, then footprint is compact, but warpage control becomes more difficult due to insufficient stress tolerance

Engineering Contradiction:
Improvepackage footprintVSAvoidwarpage resistance
Core Design Contradiction:
Area of stationary objectVSStability of the object's composition

Solution Approach 1:

By segmenting the conductive pillar into body and cap portions, the structure achieves improved stress tolerance within the same footprint. The cap portion's enlarged cross-section provides additional lateral stress bearing capacity without increasing the overall package area, allowing compact packaging while maintaining warpage resistance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The cross-sectional area parameter of the conductive pillar is changed locally at the cap portion, increasing it specifically where stress bearing is needed. This parameter change improves stress tolerance and warpage resistance without increasing the overall package footprint, as the enlargement is confined to the cap portion at the bonding interface

Inventive Principle:
Principle #35Parameter changes

3Reliability

If lateral stress tolerance is increased, then warpage is prevented, but manufacturing complexity increases

Engineering Contradiction:
Improvebonding qualityVSAvoidmanufacturing process simplicity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The segmented pillar structure with distinct body and cap portions can be manufactured using standard semiconductor fabrication processes such as selective plating or molding. The segmentation follows a simple geometric pattern that is compatible with existing manufacturing capabilities, avoiding the need for complex multi-step assembly processes

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The local quality enhancement at the cap portion can be achieved through targeted manufacturing techniques such as selective electroplating or localized molding operations. These techniques are well-established in semiconductor manufacturing and do not require fundamental process changes, thus maintaining ease of manufacture while improving bonding quality

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10217712B2Semiconductor package and semiconductor process for manufacturing the same
Publication Date: 2019.02.26 ADVANCED SEMICON ENG INC
  • US10217712B2 patent drawing
  • US10217712B2 patent drawing
  • US10217712B2 patent drawing

AI summary

A semiconductor package includes a substrate, a dielectric layer, at least one conductive pillar and an electrical device. The dielectric layer is disposed on the substrate and defines at least one through hole corresponding to the respective first pad of the substrate. The conductive pillar is disposed in the respective through hole. The conductive pillar includes a body portion and a cap portion. The body portion is physically connected to the cap portion, and the cap portion is electrically connected to the first pad. A maximum width of the cap portion is greater than a maximum width of the body portion. The electrical device is disposed on the dielectric layer and electrically connected to the body portion of the conductive pillar.