Semiconductor Package with Conductive and Supporting Frames
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Solution Overview
Problem
Semiconductor packaging technologies face challenges in warpage control and electromagnetic interference (EMI) shielding, particularly as products become smaller and more integrated, requiring improved reliability and compactness.
Innovation Solution
A package structure comprising a semiconductor chip, insulating encapsulant, conductive frame, supporting frame, and redistribution layer, with a conductive layer on the backside surface and redistribution layer on the active surface, surrounded by a conductive frame, enhancing EMI shielding and warpage control through a manufacturing method involving a carrier, supporting and conductive frames, and de-bonding processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If product size is reduced to achieve compactness, then volume and weight are reduced, but warpage control and electromagnetic interference become more critical
Solution Approach 1:
The package structure is segmented into multiple functional layers including insulating encapsulant, conductive frame, supporting frame, conductive layer, and redistribution layer. Each layer performs specific functions to collectively solve warpage control in compact packages
Solution Approach 2:
The package employs composite material structure combining insulating encapsulant with conductive frame and supporting frame. This composite structure provides both mechanical support for warpage control and EMI shielding while maintaining compact dimensions
2Volume of moving object
If product size is reduced to achieve compactness, then volume and weight are reduced, but electromagnetic interference becomes more critical
Solution Approach 1:
The conductive frame and conductive layer act as intermediary shielding structures between external electromagnetic sources and the semiconductor chip. These conductive elements intercept and redirect EMI away from sensitive components while maintaining compact package volume
Solution Approach 2:
The combination of insulating encapsulant with conductive frame creates a composite structure that provides EMI shielding functionality within compact dimensions, addressing electromagnetic interference without increasing package volume
3Volume of moving object
If integrated fan-out packages are used to achieve compactness, then volume is reduced, but warpage control becomes more difficult
Solution Approach 1:
The supporting frame acts as a counterweight structure that compensates for warpage forces in the integrated fan-out package. By strategically positioning the supporting frame around the conductive frame, it provides mechanical counterbalance to prevent warpage deformation in the compact package structure
4Reliability
If conductive frame and supporting frame are added to improve EMI shielding and warpage control, then reliability is improved, but device complexity increases
Solution Approach 1:
The conductive frame serves multiple functions simultaneously: it provides EMI shielding, structural support, and warpage control. The supporting frame similarly provides both structural reinforcement and warpage compensation. This multi-functionality reduces the need for separate dedicated components, thereby limiting the increase in device complexity while improving reliability
Data Source
AI summary
A package structure including at least one semiconductor chip, an insulating encapsulant, a conductive frame, a supporting frame, a conductive layer and a redistribution layer is provided. The at least one semiconductor chip has an active surface and a backside surface opposite to the active surface. The insulating encapsulant is encapsulating the at least one semiconductor chip. The conductive frame is surrounding the insulating encapsulant. The supporting frame is surrounding the conductive frame. The conductive layer is disposed on the backside surface of the semiconductor chip. The redistribution layer is disposed on and electrically connected to the active surface of the semiconductor chip.


