Semiconductor Package Copper Substrates Heat Dissipation
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Solution Overview
Problem
Advanced semiconductor devices generate more heat due to increased operating rates, leading to inadequate heat dissipation in existing package structures, which can damage the chip due to the low heat conducting coefficient of glass fiber substrates, resulting in accumulated heat and reduced chip life.
Innovation Solution
A semiconductor package structure featuring conductive metal substrates with separated portions and metal conductive layers, along with an insulating layer and solder paste, to enhance heat dissipation without forming short circuits, using copper for the substrates and forming through holes with metal conductive layers for improved heat conduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If glass fiber substrates are used for top and bottom substrates, then electrical insulation is provided, but heat dissipation capability deteriorates due to low heat conducting coefficient
Solution Approach 1:
The patent uses copper substrates with excellent thermal conductivity while incorporating insulating layers (such as solder paste and insulating material layers) within the substrate structure. This composite approach allows the substrate to simultaneously provide both electrical insulation through the insulating layers and superior heat dissipation through the copper material, directly resolving the contradiction between insulation and heat dissipation.
2Productivity
If operating rate of chip is increased, then productivity is improved, but heat generation increases leading to inadequate heat dissipation
Solution Approach 1:
The patent changes the material parameter of the substrates from glass fiber to copper, which has significantly higher thermal conductivity. This parameter change enables the substrate to handle the increased heat generation from higher operating rates and productivity requirements, allowing the chip to operate at higher rates without thermal damage.
3Temperature
If heat is accumulated in semiconductor element, then temperature rises increasingly, but chip life is reduced
Solution Approach 1:
The patent introduces insulating layers (such as solder paste and insulating material layers) as intermediaries between the chip and the copper substrates. These intermediary layers provide thermal conduction pathways while maintaining electrical insulation, enabling effective heat removal from the chip to prevent temperature accumulation and extend chip life.
4Temperature
If conductive metal substrates are used, then heat conduction is improved, but risk of short circuit increases
Solution Approach 1:
The patent creates a composite substrate structure where copper provides thermal conduction while insulating layers (solder paste, insulating material layers) embedded within the substrate provide electrical insulation. This composite design allows the use of conductive metal substrates for improved heat conduction while the integrated insulating layers prevent short circuits between conductive paths.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively dissipates heat generated by semiconductor elements, preventing damage from high temperatures and ensuring the longevity of the chip by utilizing copper substrates and metal conductive layers for efficient heat conduction and diffusion.
Implementation Method 1
the heat generated from the chip is mainly transferred to outside by the top substrate and the bottom substrate... the heat conducting coefficient of the glass fiber is lower, so that the heat generated from the chip is not exhausted easily
Implementation Method 2
The metal conductive layer is disposed at two sides of the insulating layer, and connected to the top substrate and the bottom substrate
Data Source
AI summary
A semiconductor package structure and manufacturing method thereof are provided, and the semiconductor package structure includes a semiconductor element, a top substrate, a bottom substrate, an insulating layer, and two metal conductive layers. The top substrate is mainly made of a conductive metal, and having a first separated portion on the top substrate, the first separated portion divides the top substrate into two blocks which are not electrically connected to each other. The bottom substrate is mainly made of the conductive metal, and having a second separated portion on the bottom substrate. The second separated portion divides the bottom substrate into two blocks which are not electrically connected to each other. The insulating layer is disposed between the top substrate and the bottom substrate. The metal conductive layer is disposed at two sides of the insulating layer and connected to the top substrate and the bottom substrate. The semiconductor element is contacted with the top substrate and the bottom substrate.