Semiconductor Package Bump Pad Layout for Corner Warpage

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Solution Overview

Problem

Semiconductor packages face issues with mechanical and electrical reliability due to warpage caused by differing thermal expansion coefficients of materials, leading to contact defects in solder bumps, especially at the edges and corners.

Innovation Solution

A semiconductor package design featuring a package substrate with center, edge, and corner regions, utilizing bump pads of varying shapes and a masking member to cover parts of these pads, particularly in the corner regions, to manage thermal expansion and prevent warpage, ensuring consistent solder bump height and reducing contact defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If materials with different coefficients of thermal expansion are used in the semiconductor package, then functional requirements are met, but warpage occurs causing bending or distortion

Engineering Contradiction:
Improvematerial selection flexibilityVSAvoidpackage flatness
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent applies different bump pad shapes in different regions to locally compensate for warpage. Circular bump pads in corner regions and rectangular bump pads in edge regions create differential stress distribution that counteracts the overall warpage effect, maintaining package flatness despite using materials with different thermal expansion coefficients

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the geometric parameters of bump pads (circular vs. rectangular shapes) to adjust the mechanical properties and stress distribution in different regions. This parameter modification allows the package to accommodate thermal expansion differences while maintaining structural stability and preventing excessive warpage

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If uniform bump pad shapes are used across the package substrate, then manufacturing simplicity is maintained, but contact defects occur in corner regions due to warpage

Engineering Contradiction:
Improvebump pad fabrication simplicityVSAvoidcontact reliability in corner regions
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent differentiates bump pad shapes by region (circular in corners, rectangular at edges) to specifically address contact defects in corner regions. This localized differentiation improves contact reliability where warpage is most severe while keeping the overall manufacturing process relatively simple through a straightforward pattern design

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design enhances mechanical and electrical reliability by minimizing warpage-induced contact defects, maintaining solder bump height consistency, and improving connectivity between the semiconductor chip and package substrate.

Implementation Method 1

since the semiconductor package may include several materials with different coefficients of thermal expansion, warpage may occur in which the semiconductor package is bent or distorted

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

a semiconductor chip on the package substrate and including a solder bump electrically connected to the bump pad

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS20250336857A1Semiconductor Package
Publication Date: 2025.10.30 SAMSUNG ELECTRONICS CO LTD
  • US20250336857A1 patent drawing
  • US20250336857A1 patent drawing
  • US20250336857A1 patent drawing

AI summary

A semiconductor package may include a package substrate including a center region and a peripheral region surrounding the center region, a bump pad including a first bump pad on the center region and a second bump pad on the peripheral region and having a planar shape different from that of the first bump pad, a semiconductor chip on the package substrate and including a solder bump electrically connected to the bump pad, and a masking member on the package substrate to cover at least a part of the bump pad, wherein the peripheral region includes an edge region in contact with each edge of the center region and corner regions positioned at both ends of the edge region, and the masking member is on the corner regions.