Semiconductor Package Lead Structure for Creepage and Board Density

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Solution Overview

Problem

Existing semiconductor packages occupy significant horizontal space on redistribution boards, limiting integration density and requiring improved reliability without increasing board space.

Innovation Solution

A semiconductor package design with leads having protruding side faces perpendicular to the semiconductor die main surfaces, featuring recesses at the leads' edges to increase electrical isolation and creepage distance, embedded in a mold compound, and optionally with exposed outer surfaces for improved heat dissipation and mechanical stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the semiconductor die is arranged perpendicular to the board surface to save horizontal space, then the area occupied on the redistribution board is reduced, but the reliability of electrical isolation between power electrodes may be compromised

Engineering Contradiction:
Improvearea occupied on redistribution boardVSAvoidelectrical isolation reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The invention transitions from horizontal arrangement to vertical arrangement by arranging the semiconductor die perpendicular to the board surface. The leads extend vertically with their outer surfaces providing contact pads on the board surface, effectively utilizing the third dimension (height) to resolve the space conflict while maintaining electrical isolation through the vertical orientation and mold compound encapsulation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The mold compound acts as an intermediary material that encapsulates the leads and provides electrical isolation between the power electrodes. The mold compound fills the space around the vertically arranged leads, ensuring reliable electrical isolation while allowing the compact vertical configuration on the redistribution board.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the leads are made thicker to improve electrical isolation, then the creepage distance increases, but the horizontal space occupied by the package increases

Engineering Contradiction:
Improveelectrical isolation and creepage distanceVSAvoidhorizontal space occupied
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The invention moves the increased lead thickness from the horizontal plane to the vertical dimension. The leads are arranged vertically with increased thickness, and their outer surfaces provide contact pads on the board surface. This vertical orientation allows the thicker leads to provide adequate creepage distance without increasing the horizontal footprint of the package.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If the leads extend beyond the semiconductor die to provide outer contact surfaces, then the electrical isolation is improved, but the complexity of the package structure increases

Engineering Contradiction:
Improveelectrical isolationVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The leads serve multiple functions: they provide electrical connection to the power electrodes, extend vertically to provide adequate creepage distance and electrical isolation, and their outer surfaces directly form the contact pads on the board surface. This multi-functionality eliminates the need for separate contact pad structures, reducing overall package complexity while maintaining improved electrical isolation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12519042B2Methods for manufacturing a semiconductor package and a semiconductor module
Publication Date: 2026.01.06 INFINEON TECH AUSTRIA AG
  • US12519042B2 patent drawing
  • US12519042B2 patent drawing
  • US12519042B2 patent drawing

AI summary

A method for manufacturing a semiconductor package includes: providing a leadframe having component positions each of which includes a die pad; providing semiconductor dies each having a first power electrode on a first main surface and a second power electrode on a second main surface; mounting a respective semiconductor die onto the die pad of a respective component position of the leadframe such that the first power electrode is attached to the die pad; mounting a clip onto the dies such that the clip is attached to a respective second power electrode; embedding at least the side faces of the dies and inner surfaces of the leadframe and clip in a mold compound to form a subassembly; and cutting through the clip and leadframe at positions between neighbouring component positions.