Semiconductor Package Lead Layout for Creepage and Mounting Reliability

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Solution Overview

Problem

Existing electronic devices for monitoring battery voltage in electric vehicles face challenges in suppressing electric discharge and ensuring reliable mounting due to thermal stress and uneven lead terminal distribution, which affects their performance and reliability.

Innovation Solution

The electronic device features a surface-mount-type semiconductor package structure with specifically arranged lead terminals and a sealing resin configuration that increases the creepage distance between terminals, reducing electric discharge and distributing thermal stress evenly across lead terminals, thereby enhancing mounting reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If lead terminals are arranged at equal intervals in SOP structure, then manufacturing is simplified, but electric discharge cannot be suppressed and thermal stress distribution becomes uneven

Engineering Contradiction:
Improvelead terminal arrangementVSAvoidelectric discharge suppression
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies asymmetry by arranging the first and second lead terminals at different positions rather than at equal intervals. Specifically, the first lead terminal is positioned at a first position and the second lead terminal is positioned at a second position, creating an asymmetric distribution that increases creepage distance between terminals of different potentials, thereby suppressing electric discharge while maintaining manufacturing feasibility.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent utilizes the surface area dimension of the SOP package by strategically positioning lead terminals at different locations on the package surface. This dimensional approach allows optimization of creepage paths across the package surface, increasing the effective discharge path length without increasing the overall package size, thus suppressing electric discharge while maintaining compact form factor.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If lead terminals are arranged at equal intervals, then manufacturing is simplified, but mounting reliability deteriorates due to uneven thermal stress

Engineering Contradiction:
Improvelead terminal arrangementVSAvoidmounting reliability
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The asymmetric positioning of lead terminals distributes thermal stress more evenly across the SOP package during mounting and operation. By placing the first lead terminal at a first position and the second lead terminal at a second position rather than at equal intervals, the structure avoids concentration of thermal stress at specific points, thereby improving mounting reliability while maintaining ease of manufacture.

Inventive Principle:
Principle #4Asymmetry

3Reliability

If creepage distance between terminals is increased, then electric discharge is suppressed, but device size increases

Engineering Contradiction:
Improveelectric discharge suppressionVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The patent increases creepage distance by utilizing the surface area dimension of the SOP package. By strategically positioning lead terminals at different locations on the package surface, the creepage path length is extended across the surface without increasing the package's height or footprint. This allows electric discharge suppression while maintaining a compact device size suitable for voltage monitoring applications.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240332137A1Electronic device
Publication Date: 2024.10.03 ROHM CO LTD
  • US20240332137A1 patent drawing
  • US20240332137A1 patent drawing
  • US20240332137A1 patent drawing

AI summary

An electronic device includes an electronic component, a sealing resin covering the electronic component, first and second terminals protruding from the sealing resin toward a first side in a first direction, and plural third terminals protruding from the sealing resin toward a second side in the first direction. The first and second terminals are located side by side with a first interval in a second direction. The third terminals are arranged in the second direction with a second interval. The first interval is greater than the second interval. Along the second direction, the first mount portion of the first terminal has a first dimension, the second mount portion of the second terminal has a second dimension, and the third mount portion of each third terminal has a third dimension. The first and second dimensions are greater than the third dimension.