Semiconductor Package Dam Structure Adhesive Delamination
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Solution Overview
Problem
Semiconductor packages face challenges in achieving structural reliability due to delamination between adhesive and molding layers, particularly during the dicing process, which can lead to physical damage and reduced performance.
Innovation Solution
A semiconductor package design incorporating a dam structure on the package substrate with a specific adhesive layer configuration, where the adhesive layer is supported by the dam structure, preventing it from being observed from the side surface and reducing delamination, and a method of manufacturing that involves forming the dam structure and adhesive layer before dicing to minimize physical damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the adhesive layer is disposed to extend to the side surface of the semiconductor package, then the bonding area is increased, but delamination between the adhesive layer and molding layer occurs during dicing
Solution Approach 1:
The adhesive layer is segmented into different regions: a first adhesive layer region extending to the side surface to maximize bonding area, and a second adhesive layer region recessed from the side surface to prevent delamination during dicing. This segmentation allows the adhesive layer to simultaneously achieve both large bonding area and delamination resistance.
Solution Approach 2:
Different portions of the adhesive layer have different spatial configurations: the first adhesive layer region has a configuration that maximizes bonding area, while the second adhesive layer region has a recessed configuration that prevents delamination. This local quality differentiation resolves the contradiction between bonding area and delamination resistance.
2Reliability
If the adhesive layer is recessed from the side surface, then delamination is reduced, but the bonding area is decreased
Solution Approach 1:
The adhesive layer is divided into two distinct regions with different configurations. The first adhesive layer region extends to the side surface to provide large bonding area, while the second adhesive layer region is recessed to provide delamination resistance. This segmentation allows both requirements to be satisfied simultaneously in different locations.
Solution Approach 2:
The solution moves from a two-dimensional planar adhesive layer to a three-dimensional structured adhesive layer with varying heights. By utilizing the vertical dimension, the adhesive layer can have both extended and recessed portions, resolving the contradiction between bonding area and delamination resistance.
3Ease of manufacture
If the dam structure is not provided, then the manufacturing process is simplified, but the adhesive layer cannot be supported during dicing
Solution Approach 1:
The dam structure serves as an intermediary element between the adhesive layer and the dicing process. It provides mechanical support to the adhesive layer during dicing, preventing delamination. The dam structure is subsequently removed, having fulfilled its supporting function without becoming part of the final product.
Solution Approach 2:
The dam structure is formed beforehand to provide cushioning support to the adhesive layer during the dicing process. This preliminary structural support prevents delamination from occurring in the first place, and the dam structure is later removed after serving its protective function.
Data Source
AI summary
A semiconductor package includes a semiconductor chip on a package substrate, a dam structure disposed on the package substrate and surrounding the semiconductor chip, the dam structure including a first dam portion having a first length in a vertical direction, and a second dam portion connected to the first dam portion and extending from an outer side of the first dam portion, and having a second length less than the first length in the vertical direction, and an adhesive layer disposed on the package substrate, the adhesive layer including a first adhesive portion disposed between the semiconductor chip and the package substrate and overlapping the semiconductor chip in the vertical direction, and a second adhesive portion on an outer side of the semiconductor chip and including at least a part contacting a top surface of the first dam portion.


