Semiconductor Package Depression Structure for Solder Wetting
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Solution Overview
Problem
Semiconductor package structures in the auto-vehicle field face challenges with solder wetting issues due to molding compound coverage and oxidation of exposed circuit layers, which hinder reliable joint formation between the semiconductor package and the motherboard.
Innovation Solution
A semiconductor package structure is designed with a base material, semiconductor chip, encapsulant, redistribution layer, and conductive via, featuring a depression structure and wetting layer on the outer side surface to facilitate solder wetting, and a manufacturing method that includes forming specific holes and holes in the encapsulant to expose the circuit layer and depression structure during the singulation process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the lateral side surfaces are covered with molding compound for protection, then the semiconductor package structure is protected, but solder cannot wet the lateral side surfaces preventing joint quality inspection
Solution Approach 1:
The lateral side surface is segmented into two functional zones: an upper portion covered with molding compound for protection, and a lower portion exposed to serve as a wettable flank for solder wetting and joint quality inspection. This segmentation allows both protection and solder accessibility to coexist.
Solution Approach 2:
Different portions of the lateral side surface are given different properties: the upper portion has protective molding compound coverage while the lower portion has an exposed circuit layer with solderable finish. This local differentiation enables the surface to simultaneously provide protection and solder wetting functionality.
2Reliability
If the circuit layer is exposed on lateral side surfaces for solder wetting, then solder can wet the surface, but the exposed circuit layer oxidizes readily preventing solder wetting
Solution Approach 1:
A solderable finish (such as electroplated metal layer) is applied to the exposed circuit layer portion before final packaging. This preliminary protective coating prevents oxidation of the circuit layer while maintaining solder wetting capability, addressing both concerns proactively.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances solder wetting and joint reliability by exposing the depression structure and redistribution layer, improving the yield rate and reliability of the surface mounting technique.
Implementation Method 1
The wetting layer is disposed on the outer side surface of the redistribution layer
Implementation Method 2
The conductive via is disposed in the encapsulant and electrically connects the semiconductor chip and the redistribution layer
Data Source
AI summary
A semiconductor package structure includes a base material, at least one semiconductor chip, an encapsulant, a depression structure, a redistribution layer and at least one conductive via. The semiconductor chip is disposed on the base material. The encapsulant is disposed on the base material and covers the at least one semiconductor chip. The encapsulant has an outer side surface. The depression structure is disposed adjacent to and exposed from of the outer side surface the encapsulant. The redistribution layer is disposed on the encapsulant. The conductive via is disposed in the encapsulant and electrically connects the semiconductor chip and the redistribution layer.


